-+ if (rw == BX_READ) {
-+ BX_INSTR_LIN_READ(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.taint_paddress1, length);
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1, length, taint_value);
-+ }
-+ else {
-+ BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.taint_paddress1, length);
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1, length, taint_value);
-+ }
-+ //if (rw==BX_WRITE) BX_CPU_THIS_PTR address_xlation.taint_write_paddress1 = BX_CPU_THIS_PTR address_xlation.taint_paddress1;
-+ }
-+ else {
-+ try_access = taint_dtranslate_linear(laddr, pl, xlate_rw);
-+ if (try_access==-1) return 0;
-+ // access across 2 pages
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1 = try_access;
-+ BX_CPU_THIS_PTR address_xlation.taint_len1 = 4096 - pageOffset;
-+ BX_CPU_THIS_PTR address_xlation.taint_len2 = length -
-+ BX_CPU_THIS_PTR address_xlation.taint_len1;
-+ BX_CPU_THIS_PTR address_xlation.taint_pages = 2;
-+ try_access = taint_dtranslate_linear(laddr + BX_CPU_THIS_PTR address_xlation.taint_len1, pl, xlate_rw);
-+ if (try_access==-1) return 0;
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress2 = try_access;
-+
-+#ifdef BX_LITTLE_ENDIAN
-+ if (rw == BX_READ) {
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1, taint_value);
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2,
-+ ((Bit32u*)taint_value) + BX_CPU_THIS_PTR address_xlation.taint_len1);
-+ }
-+ else {
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1, taint_value);
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2,
-+ ((Bit32u*)taint_value) + BX_CPU_THIS_PTR address_xlation.taint_len1);
-+ }
-+
-+#else // BX_BIG_ENDIAN
-+ if (rw == BX_READ) {
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1,
-+ ((Bit32u*)taint_value) + (length - BX_CPU_THIS_PTR address_xlation.taint_len1));
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2, taint_value);
-+ }
-+ else {
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1,
-+ ((Bit32u*)taint_value) + (length - BX_CPU_THIS_PTR address_xlation.taint_len1));
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this, BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2, taint_value);
-+ }
-+#endif
-+
-+ //if (rw==BX_WRITE) BX_CPU_THIS_PTR address_xlation.taint_write_paddress1 = BX_CPU_THIS_PTR address_xlation.taint_paddress1;
-+ }
-+ }
-+
-+ else {
-+ // Paging off.
-+ if ( (pageOffset + length) <= 4096 ) {
-+ // Access within single page.
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1 = laddr;
-+ BX_CPU_THIS_PTR address_xlation.taint_pages = 1;
-+ if (rw == BX_READ) {
-+
-+ // Let access fall through to the following for this iteration.
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this, laddr, length, taint_value);
-+ }
-+ else { // Write
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this, laddr, length, taint_value);
-+ }
-+ }
-+ else {
-+ // Access spans two pages.
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1 = laddr;
-+ BX_CPU_THIS_PTR address_xlation.taint_len1 = 4096 - pageOffset;
-+ BX_CPU_THIS_PTR address_xlation.taint_len2 = length -
-+ BX_CPU_THIS_PTR address_xlation.taint_len1;
-+ BX_CPU_THIS_PTR address_xlation.taint_pages = 2;
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress2 = laddr +
-+ BX_CPU_THIS_PTR address_xlation.taint_len1;
-+
-+#ifdef BX_LITTLE_ENDIAN
-+ if (rw == BX_READ) {
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1, taint_value);
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2,
-+ ((Bit32u*)taint_value) + BX_CPU_THIS_PTR address_xlation.taint_len1);
-+ }
-+ else {
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1, taint_value);
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2,
-+ ((Bit32u*)taint_value) + BX_CPU_THIS_PTR address_xlation.taint_len1);
-+ }
-+
-+#else // BX_BIG_ENDIAN
-+ if (rw == BX_READ) {
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1,
-+ ((Bit32u*)taint_value) + (length - BX_CPU_THIS_PTR address_xlation.taint_len1));
-+ BX_CPU_THIS_PTR mem->readPhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2, taint_value);
-+ }
-+ else {
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress1,
-+ BX_CPU_THIS_PTR address_xlation.taint_len1,
-+ ((Bit32u*)taint_value) + (length - BX_CPU_THIS_PTR address_xlation.taint_len1));
-+ BX_CPU_THIS_PTR mem->writePhysicalTaintPage(this,
-+ BX_CPU_THIS_PTR address_xlation.taint_paddress2,
-+ BX_CPU_THIS_PTR address_xlation.taint_len2, taint_value);
-+ }
-+#endif
-+ }
-+ //if (rw==BX_WRITE) BX_CPU_THIS_PTR address_xlation.taint_write_paddress1 = BX_CPU_THIS_PTR address_xlation.taint_paddress1;
-+ }
-+ return 1;