1 /* This file is derived from source code used in MIT's 6.828
2 course. The original copyright notice is reproduced in full
6 * Copyright (C) 1997 Massachusetts Institute of Technology
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41 #include "threads/loader.h"
42 #include "threads/mmu.h"
46 #### This code should be stored in the first sector of the hard disk.
47 #### When the BIOS runs, it loads this code at physical address
48 #### 0x7c00-0x7e00 (512 bytes). Then it jumps to the beginning of it,
49 #### in real mode. This code switches into protected mode (32-bit
50 #### mode) so that all of memory can accessed, loads the kernel into
51 #### memory, and jumps to the first byte of the kernel, where start.S
54 /* Flags in control register 0 */
55 #define CR0_PE 0x00000001 /* Protection Enable. */
56 #define CR0_EM 0x00000004 /* (Floating-point) Emulation. */
57 #define CR0_PG 0x80000000 /* Paging. */
58 #define CR0_WP 0x00010000 /* Write-Protect enable in kernel mode. */
60 # Code runs in real mode, which is a 16-bit segment.
65 # String instructions go upward.
70 # Set up data segments and stack.
76 # Stack grows downward starting from us.
77 # We don't ever use the stack so this is strictly speaking
83 #### Enable A20. Address line 20 is tied to low when the machine
84 #### boots, which prevents addressing memory about 1 MB. This code
87 # Poll status register while busy.
93 # Send command for writing output port.
98 # Poll status register while busy.
109 #### Get memory size, via interrupt 15h function 88h. Returns CF
110 #### clear if successful, with AX = (kB of physical memory) - 1024.
111 #### This only works for memory sizes <= 65 MB, which should be fine
112 #### for our purposes.
116 jc panic # Carry flag set on error
117 addl $1024, %eax # Total kB
118 shrl $2, %eax # Total 4 kB pages
121 #### Create temporary page directory and page table and set page
122 #### directory base register.
124 # Create page directory at 64 kB and fill with zeroes.
133 # Set PDEs for 0 and LOADER_PHYS_BASE to point to the page table.
135 movl $0x11000 | PG_U | PG_W | PG_P, %eax
137 movl %eax, %es:LOADER_PHYS_BASE >> 20
139 # Initialize page table.
141 movl $PG_U | PG_W | PG_P, %eax
147 # Set page directory base register.
152 #### Switch to protected mode.
154 # First we turn off interrupts because we don't set up an IDT.
158 # Then we point the GDTR to our GDT. Protected mode requires a GDT.
159 # We need a data32 prefix to ensure that all 32 bits of the GDT
160 # descriptor are loaded (default is to load only 24 bits).
164 # Then we turn on the following bits in CR0:
165 # PE (Protect Enable): this turns on protected mode.
166 # PG (Paging): turns on paging.
167 # WP (Write Protect): if unset, ring 0 code ignores
168 # write-protect bits in page tables (!).
169 # EM (Emulation): forces floating-point instructions to trap.
170 # We don't support floating point.
173 orl $CR0_PE | CR0_PG | CR0_WP | CR0_EM, %eax
176 # We're now in protected mode in a 16-bit segment. The CPU still has
177 # the real-mode code segment cached in %cs's segment descriptor. We
178 # need to reload %cs, and the easiest way is to use a far jump.
179 # Because we're not in a 32-bit segment the data32 prefix is needed to
180 # jump to a 32-bit offset.
182 data32 ljmp $SEL_KCSEG, $1f + LOADER_PHYS_BASE
184 # We're now in protected mode in a 32-bit segment.
188 # Reload all the other segment registers and the stack pointer to
189 # point into our new GDT.
191 1: movw $SEL_KDSEG, %ax
197 movl $LOADER_PHYS_BASE + 0x20000, %esp
199 #### Load kernel starting at physical address LOADER_KERN_BASE by
200 #### frobbing the IDE controller directly.
203 movl $LOADER_KERN_BASE + LOADER_PHYS_BASE, %edi
206 # Poll status register while controller busy.
213 # Read a single sector.
219 # Sector number to write in low 28 bits.
220 # LBA mode, device 0 in top 4 bits.
223 andl $0x0fffffff, %eax
224 orl $0xe0000000, %eax
226 # Dump %eax to ports 0x1f3...0x1f6.
234 # READ command to command register.
240 # Poll status register while controller busy.
246 # Poll status register until data ready.
261 cmpl $KERNEL_LOAD_PAGES*8 + 1, %ebx
264 #### Jump to kernel entry point.
266 movl $LOADER_PHYS_BASE + LOADER_KERN_BASE, %eax
273 .quad 0x0000000000000000 # null seg
274 .quad 0x00cf9a000000ffff # code seg
275 .quad 0x00cf92000000ffff # data seg
278 .word 0x17 # sizeof (gdt) - 1
279 .long gdt + LOADER_PHYS_BASE # address gdt
282 #### Print panicmsg (with help from the BIOS) and spin.
284 panic: .code16 # We only panic in real mode.
295 .ascii "Loader panic!\r\n"
298 #### Memory size in 4 kB pages.
299 .org LOADER_RAM_PAGES - LOADER_BASE
303 #### Command-line arguments inserted by another utility.
304 #### The loader doesn't use these, but we note their
305 #### location here for easy reference.
306 .org LOADER_CMD_LINE - LOADER_BASE
310 #### Boot-sector signature for BIOS inspection.
311 .org LOADER_BIOS_SIG - LOADER_BASE