3 <META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
4 <META NAME="Author" CONTENT="Joshua Neal">
5 <META NAME="Description" CONTENT="Pure VGA/SVGA hardware programming (registers, identification, and otherlow-level stuff.)">
6 <META NAME="KeyWords" CONTENT="VGA SVGA hardware video programming">
7 <TITLE>FreeVGA - Overview of Video Hardware Functionality</TITLE>
11 <CENTER><A HREF="home.htm">Home</A> <A HREF="#intro">Introduction</A> <A HREF="#frame">Frame
12 Buffer</A> <A HREF="#graphics">Graphics Controller</A> <A HREF="#display generation">Display
13 Generation</A> <A HREF="home.htm#background">Back</A>
14 <HR><B>Hardware Level VGA and SVGA Video Programming Information Page</B></CENTER>
16 <CENTER>Overview of Video Hardware Functionality
18 <A NAME="intro"></A><B>Introduction</B>
19 <BR> This page contains a general
20 overview of the functionality of VGA and SVGA cards into various sections,
21 and gives a description of the functions of each section. This is
22 intended to be a general description for those unfamiliar to the functionality
23 and capabilities of graphics hardware. The basic function of graphics
24 hardware is to allow the CPU to manipulate memory specific to the graphics
25 hardware, and to take the information stored in that memory and output
26 it in a form that a monitor or LCD panel can use.
28 <P><A NAME="frame"></A><B>Frame Buffer</B>
29 <BR> This is the component of
30 the video hardware that stores the pixels and information to be displayed
31 on the monitor. This is the center of the video hardware, as nearly
32 all operations are performed on or using this data. The frame buffer
33 is a form of RAM, which is typically located outside the main graphics
34 chip and are implemented using DRAM chips; however, more sophisticated
35 forms of RAM that are ideal for video hardware applications, such as VRAM.
36 The amount of video memory that is present determines the maximum resolution
37 that the hardware can generate. The frame buffer is usually mapped
38 into a region of the host CPU's address space allowing it to be accessed
39 as if it were a portion of the main memory. For example, in the VGA,
40 this memory is mapped into the lower 1M of the CPU address space, allowing
41 it to be directly accessable to real mode applications, which cannot directly
42 access the remaining memory. In the VGA, this memory is broken up
43 into 4 separate color planes, which are recombined to produce the actual
44 pixel values at the time of display generation.
46 <P><A NAME="graphics"></A><B>Graphics Controller</B>
47 <BR> This is the video chipset's
48 host interface to the frame buffer, and is part of the main graphics chip
49 or chips. It allows the host CPU to manipulate the frame buffer in
50 a fashion suited to the task of graphics operations. It allows certain
51 methods of access that are designed to reduced the CPU requirements for
52 performing standard video operations, particularly in accelerated chipsets,
53 which can have a quite complicated set of access methods which can include
54 line drawing, area and pattern fill, color conversion/expansion, and even
55 3d rendering acceleration. For example, in the VGA the graphics controller
56 allows one write by the CPU to its mapped memory region below 1M to affect
57 all four color planes, as well as allowing faster transfers of video data
58 from one region to another in video memory.
60 <P><A NAME="display generation"></A><B>Display Generation</B>
61 <BR> This portion of the graphics
62 hardware is involved in taking the data in the frame buffer, converting
63 the pixel or character information stored by the graphics controller, and
64 converting it into the analog signals required by the monitor or lcd display.
65 The pixel data is first sequenced, or read serially from the frame buffer,
66 then converted into analog color information, either by a palette look-up
67 table, or by directly converting into red, green, and blue components.
68 The CRT controller at the same time adds timing signals that allow the
69 monitor to display the analog color information on the display. For
70 example, in the VGA these components are made up of the sequencer, attribute
71 controller, CRT controller, DAC, and palette table. The sequencer
72 reads the information from the frame buffer, and converts it into pixel
73 color information, as well as sends signals to the CRT controller such
74 that it can provide the timing signals the monitor requires. This
75 color information is formatted by the attribute controller in such a way
76 that the pixel values can be submitted to the DAC. The DAC then looks
77 up these values in its palette table which contains red, green, and blue
78 intensities for each of the colors that the attribute controller generates,
79 then converts it into an analog signal that is output to the VGA connector
80 along with the timing signals generated by the CRT controller. If
81 the display is an LCD panel such as found in laptops, the DAC and associated
82 support hardware convert the pixel values to signals that the LCD panel
85 <P>Notice: All trademarks used or referred to on this page are the property
86 of their respective owners.
87 <BR>All pages are Copyright © 1997, 1998, J. D. Neal, except where
88 noted. Permission for utilization and distribution is subject to the terms
89 of the <A HREF="license.htm">FreeVGA Project Copyright License</A>.
projects / pintos-anon / blob