Update Intel architecture guide references to latest.

[pintos-anon] / src / userprog / tss.c

diff --git a/src/userprog/tss.c b/src/userprog/tss.c
index 69113e4d36e376424fe9c6a1b916f6f402220602..dfda3b9857d424dd250f0b4015ba350d9a23f3cc 100644 (file)
--- a/src/userprog/tss.c
+++ b/src/userprog/tss.c
@@ -1,7 +1,7 @@
-#include "tss.h"
+#include "userprog/tss.h"
+#include <debug.h>
 #include <stddef.h>
-#include "gdt.h"
-#include "lib/debug.h"
+#include "userprog/gdt.h"
 #include "threads/mmu.h"
 #include "threads/palloc.h"
 
@@ -43,9 +43,10 @@
        stack pointer to point to the new thread's kernel stack.
        (The call is in schedule_tail() in thread.c.)
 
-   See [IA32-v3] 6.2.1 for a description of the TSS and 5.12.1
-   for a description of when and how stack switching occurs
-   during an interrupt. */
+   See [IA32-v3a] 6.2.1 "Task-State Segment (TSS)" for a
+   description of the TSS.  See [IA32-v3a] 5.12.1 "Exception- or
+   Interrupt-Handler Procedures" for a description of when and
+   how stack switching occurs during an interrupt. */
 struct tss
   {
     uint16_t back_link, :16;
@@ -80,7 +81,7 @@ tss_init (void)
   /* Our TSS is never used in a call gate or task gate, so only a
      few fields of it are ever referenced, and those are the only
      ones we initialize. */
-  tss = palloc_get (PAL_ASSERT | PAL_ZERO);
+  tss = palloc_get_page (PAL_ASSERT | PAL_ZERO);
   tss->esp0 = ptov(0x20000);
   tss->ss0 = SEL_KDSEG;
   tss->bitmap = 0xdfff;