Update Intel architecture guide references to latest.

[pintos-anon] / src / threads / init.c

diff --git a/src/threads/init.c b/src/threads/init.c
index c6917e224b393b5299dddabd40d1541fbeeef33c..cb4edf9deb5a7a39eae5b12f8f030e4d3f3e1e2b 100644 (file)
--- a/src/threads/init.c
+++ b/src/threads/init.c
@@ -188,7 +188,8 @@ paging_init (void)
   /* Store the physical address of the page directory into CR3
      aka PDBR (page directory base register).  This activates our
      new page tables immediately.  See [IA32-v2a] "MOV--Move
-     to/from Control Registers" and [IA32-v3] 3.7.5. */
+     to/from Control Registers" and [IA32-v3a] 3.7.5 "Base Address
+     of the Page Directory". */
   asm volatile ("movl %0, %%cr3" :: "r" (vtop (base_page_dir)));
 }