--- /dev/null
+<HTML>\r
+<HEAD>\r
+ <META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">\r
+ <META NAME="Author" CONTENT="Joshua Neal">\r
+ <META NAME="Description" CONTENT="Pure VGA/SVGA hardware programming (registers, identification, and otherlow-level stuff.)">\r
+ <META NAME="KeyWords" CONTENT="VGA SVGA hardware video programming">\r
+ <TITLE>FreeVGA--Special Effects Hardware</TITLE>\r
+</HEAD>\r
+<BODY>\r
+\r
+<CENTER><A HREF="../home.htm">Home</A> <A HREF="#intro">Intro</A> <A HREF="#window">Windowing</A>\r
+<A HREF="#paging">Paging</A> <A HREF="#smooth">Smooth Scrolling</A> <A HREF="#split">Split-Screen</A>\r
+<A HREF="vga.htm#general">Back\r
+<HR WIDTH="100%"></A><B>Hardware Level VGA and SVGA Video Programming Information\r
+Page</B></CENTER>\r
+\r
+<CENTER>Special Effects Hardware \r
+<HR WIDTH="100%"></CENTER>\r
+\r
+<UL>\r
+<LI>\r
+<A HREF="#intro">Introduction</A> -- describes the capabilities of the\r
+VGA special effects hardware.</LI>\r
+\r
+<LI>\r
+<A HREF="#window">Windowing</A> -- provides rough panning and scrolling\r
+of a larger virtual image.</LI>\r
+\r
+<LI>\r
+<A HREF="#paging">Paging</A> -- provides the ability to switch between\r
+multiple screens rapidly.</LI>\r
+\r
+<LI>\r
+<A HREF="#smooth">Smooth Panning and Scrolling</A> -- provides more precise\r
+control when panning and scrolling.</LI>\r
+\r
+<LI>\r
+<A HREF="#split">Split-Screen Operation</A> -- provides a horizontal division\r
+which allows independent scrolling and panning of the top window.</LI>\r
+</UL>\r
+<A NAME="intro"></A><B>Introduction</B>\r
+<BR> This section describes the\r
+capabilities of the VGA hardware that can be used to implement special\r
+effects such as windowing, paging, smooth panning and scrolling, and split\r
+screen operation.. These functions are probably the least utilized of all\r
+of the VGA's capabilities, possibly because most texts devoted to video\r
+hardware provide only brief documentation. Also, the video BIOS provides\r
+no support for these capabilities so the VGA card must be programmed at\r
+the hardware level in order to utilize these capabilities. Windowing allows\r
+a program to view a portion of an image in display memory larger than the\r
+current display resolution, providing rough panning and scrolling. Paging\r
+allows multiple display screens to be stored in the display memory allowing\r
+rapid switching between them. Smooth panning and scrolling works in conjunction\r
+with windowing to provide more precise control of window position. Split-screen\r
+operation allows the creation of a horizontal division on the screen that\r
+creates a window below that remains fixed in place independent of the panning\r
+and scrolling of the window above. These features can be combined to provide\r
+powerful control of the display with minimal demand on the host CPU.\r
+\r
+<P><A NAME="window"></A><B>Windowing</B>\r
+<BR> The VGA hardware has the\r
+ability treat the display as a window which can pan and/or scroll across\r
+an image larger than the screen, which is used by some windowing systems\r
+to provide a virtual scrolling desktop, and by some games and assembly\r
+demos to provide scrolling. Some image viewers use this to allow viewing\r
+of images larger than the screen. This capability is not limited to graphics\r
+mode; some terminal programs use this capability to provide a scroll-back\r
+buffer, and some editors use this to provide an editing screen wider than\r
+80 columns.\r
+<BR> This feature can be implemented\r
+by brute force by simply copying the portion of the image to be displayed\r
+to the screen. Doing this, however takes significant processor horsepower.\r
+For example, scrolling a 256 color 320x200 display at 30 frames per second\r
+by brute force requires a data transfer rate of 1.92 megabytes/second.\r
+However, using the hardware capability of the VGA the same operation would\r
+require a data transfer rate of only 120 bytes/second. Obviously there\r
+is an advantage to using the VGA hardware. However, there are some limitations--one\r
+being that the entire screen must scroll (or the top portion of the screen\r
+if split-screen mode is used.) and the other being that the maximum size\r
+of the virtual image is limited to the amount of video memory accessible,\r
+although it is possible to redraw portions of the display memory to display\r
+larger virtual images.\r
+<BR> In text mode, windowing\r
+allows panning at the character resolution. In graphics mode, windowing\r
+allows panning at 8-bit resolution and scrolling at scan-line resolution.\r
+For more precise control, see <A HREF="#smooth">Smooth Panning and Scrolling</A>\r
+below. Because the VGA BIOS and most programming environment's graphics\r
+libraries do not support windowing, you must modify or write your own routines\r
+to write to the display for functions such as writing text or graphics.\r
+This section assumes that you have the ability to work with the custom\r
+resolutions possible when windowing is used.\r
+<BR> In order to understand virtual\r
+resolutions it is necessary to understand how the VGA's <A HREF="crtcreg.htm#0C">Start\r
+Address High Register</A>, <A HREF="crtcreg.htm#0D">Start Address Low Register</A>,\r
+and <A HREF="crtcreg.htm#13">Offset</A> field work. Because display memory\r
+in the VGA is accessed by a 32-bit bus, a 16-bit address is sufficient\r
+to uniquely identify any location in the VGA's 256K address space. The\r
+<A HREF="crtcreg.htm#0C">Start Address High Register</A> and <A HREF="crtcreg.htm#0D">Start\r
+Address Low Register</A> provide such an address. This address is used\r
+to specify either the location of the first character in text mode or the\r
+position of the first byte of pixels in graphics mode. At the end of the\r
+vertical retrace, the current line start address is loaded with this value.\r
+This causes one scan line of pixels or characters to be output starting\r
+at this address. At the beginning of the next scan-line (or character row\r
+in text mode) the value of the <A HREF="crtcreg.htm#13">Offset Register</A>\r
+multiplied by the current memory address size * 2 is added to the current\r
+line start address. The <A HREF="crtcreg.htm#14">Double-Word Addressing</A>\r
+field and the <A HREF="crtcreg.htm#17">Word/Byte</A> field specify the\r
+current memory address size. If the value of the <A HREF="crtcreg.htm#14">Double-Word\r
+Addressing</A> field is 1, then the current memory address size is four\r
+(double-word). Otherwise, the <A HREF="crtcreg.htm#17">Word/Byte</A> field\r
+specifies the current memory address size. If the value of the <A HREF="crtcreg.htm#17">Word/Byte</A>\r
+field is 0 then the current memory address size is 2 (word) otherwise,\r
+the current memory address size is 1 (byte).\r
+<BR> Normally in graphics modes,\r
+the offset register is programmed to represent (after multiplication) the\r
+number of bytes in a scan line. This means that (unless a CGA/MDA emulation\r
+mode is in effect) scan lines will be arranged sequentially in memory with\r
+no space in between, allowing for the most compact representation in display\r
+memory. However, this does not have to be the case--in fact, by increasing\r
+the value of the offset register we can leave "extra space" between lines.\r
+This is what provides for virtual widths. By programming the offset register\r
+to the value of the equation:\r
+\r
+<P> <B>Offset = VirtualWidth\r
+/ ( PixelsPerAddress * MemoryAddressSize * 2 )</B>\r
+\r
+<P>VirtualWidth is the width of the virtual resolution in pixels, and PixelsPerAddress\r
+is the number of pixels per display memory address (1, 2, 4 or 8) depending\r
+on the current video mode. For virtual text modes, the offset register\r
+is programmed with the value of the equation:\r
+\r
+<P> <B>Offset = VirtualWidth\r
+/ ( MemoryAddressSize * 2 )</B>\r
+\r
+<P>In text mode, there is always one character per display memory address.\r
+In standard CGA compatible text modes, MemoryAddressSize is 2 (word).\r
+<BR> After you have programmed\r
+the new offset, the screen will now display only a portion of a virtual\r
+display. The screen will display the number of scan-lines as specified\r
+by the current mode. If the screen reaches the last byte of memory, the\r
+next byte of memory will wrap around to the first byte of memory. Remember\r
+that the Start Address specifies the display memory address of the upper-left\r
+hand character or pixel. Thus the maximum height of a virtual screen depends\r
+on the width of the virtual screen. By increasing this by the number of\r
+bytes in a scan-line (or character row), the display will scroll one scan-line\r
+or character row vertically downwards. By increasing the Start Address\r
+by less than the number of bytes in a scan line, you can move the virtual\r
+window horizontally to the right. If the virtual width is the same as the\r
+actual width, one can create a vertical scrolling mode. This is used sometimes\r
+as an "elevator" mode or to provide rapid scrollback capability in text\r
+mode. If the virtual height is the same as the actual height, then only\r
+horizontal panning is possible, sometimes called "panoramic" mode. In any\r
+case, the equation for calculating the Start Address is:\r
+\r
+<P><B> Start Address = StartingOffset\r
++ Y * BytesPerVirtualRow + X</B>\r
+\r
+<P>Y is the vertical position, from 0 to the value of the VitrualHeight\r
+- ActualHeight. X is the horizontal position, from 0 to the value of BytesPerVirtualRow\r
+- BytesPerActualRow . These ranges prevent wrapping around to the left\r
+side of the screen, although you may find it useful to use the wrap-around\r
+for whatever your purpose. Note that the wrap-around simply starts displaying\r
+the next row/scan-line rather than the current one, so is not that useful\r
+(except when using programming techniques that take this factor into account.)\r
+Normally StartingOffset is 0, but if paging or split-screen mode is being\r
+used, or even if you simply want to relocate the screen, you must change\r
+the starting offset to the address of the upper-left hand pixel of the\r
+virtual screen.\r
+<BR> For example, a 512x300 virtual\r
+screen in a 320x200 16-color 1 bit/pixel planar display would require 512\r
+pixels / 8 pixels/byte = 64 bytes per row and 64 bytes/row * 300 lines\r
+= 19200 bytes per screen. Assuming the VGA is in byte addressing mode,\r
+this means that we need to program the offset register <A HREF="crtcreg.htm#13">Offset</A>\r
+field with 512 pixels / (8 pixels/byte * 1 * 2) = 32 (20h). Adding one\r
+to the start address will move the display screen to the right eight pixels.\r
+More precise control is provided by the smooth scrolling mechanism. Adding\r
+64 to the start address will move the virtual screen down one scan line.\r
+See the following chart which shows the virtual screen when the start address\r
+is calculated with an X and Y of 0:\r
+<CENTER><A HREF="virtual.txt"><IMG SRC="virtual.gif" ALT="Click for Textified Virtual Screen Mode Example" HEIGHT=256 WIDTH=376></A></CENTER>\r
+\r
+\r
+<P><A NAME="paging"></A><B>Paging</B>\r
+<BR> The video display memory\r
+may be able to hold more than one screen of data (or virtual screen if\r
+virtual resolutions are used.) These multiple screens, called pages, allows\r
+rapid switching between them. As long as they both have the same actual\r
+(and virtual if applicable) resolution, simply changing the Start Address\r
+as given by the <A HREF="crtcreg.htm#0C">Start Address High Register</A>\r
+and <A HREF="crtcreg.htm#0D">Start Address Low Register</A> pair to point\r
+to the memory address of the first byte of the page (or set the StartingOffset\r
+term in the equation for virtual resolutions to the first memory address\r
+of the page.) If they have different virtual widths, then the <A HREF="crtcreg.htm#13">Offset</A>\r
+field must be reprogrammed. It is possible to store both graphics and text\r
+pages simultaneously in memory, in addition to different graphics mode\r
+pages. In this case, the video mode must be changed when changing pages.\r
+In addition, in text mode the Cursor Location must be reprogrammed for\r
+each page if it is to be displayed. Also paging allows for double buffering\r
+of the display -- the CPU can write to one page while the VGA hardware\r
+is displaying another. By switching between pages during the vertical retrace\r
+period, flicker free screen updates can be implemented.\r
+<BR> An example of paging is\r
+that used by the VGA BIOS in the 80x25 text mode. Each page of text takes\r
+up 2000 memory address locations, and the VGA uses a 32K memory aperture,\r
+with the Odd/Even addressing enabled. Because Odd/Even addressing is enabled,\r
+each page of text takes up 4000 bytes in host memory, thus 32768 / 4000\r
+= 8 (rounded down) pages can be provided and can be accessed at one time\r
+by the CPU. Each page starts at a multiple of 4096 (1000h). Because the\r
+display controller circuitry works independent of the host memory access\r
+mode, this means that each page starts at a display address that is a multiple\r
+of 2048 (800h), thus the Starting Address is programmed to the value obtained\r
+by multiplying the page to be displayed by 2048 (800h). See the following\r
+chart which shows the arrangement of these pages in display memory:\r
+<BR> \r
+<CENTER><A HREF="paging.txt"><IMG SRC="paging.gif" ALT="Click here to display a textified Paging Memory Utilization Example" HEIGHT=256 WIDTH=376></A></CENTER>\r
+\r
+\r
+<P><A NAME="smooth"></A><B>Smooth Panning and Scrolling</B>\r
+<BR> Because the Start Address\r
+field only provides for scrolling and panning at the memory address level,\r
+more precise panning and scrolling capability is needed to scroll at the\r
+pixel level as multiple pixels may reside at the same memory address especially\r
+in text mode where the Start Address field only allows panning and scrolling\r
+at the character level.\r
+<BR> Pixel level panning is controlled\r
+by the <A HREF="attrreg.htm#13">Pixel Shift Count</A> and <A HREF="crtcreg.htm#08">Byte\r
+Panning</A> fields. The <A HREF="attrreg.htm#13">Pixel Shift Count</A>\r
+field specifies the number of pixels to shift left. In all graphics modes\r
+and text modes except 9 dot text modes and 256 color graphics modes, the\r
+<A HREF="attrreg.htm#13">Pixel Shift Count</A> is defined for values 0-7.\r
+This provides the pixel level control not provided by the <A HREF="crtcreg.htm#0D">Start\r
+Address Register</A> or the <A HREF="crtcreg.htm#08">Byte Panning</A> fields.\r
+In 9 dot text modes the <A HREF="attrreg.htm#13">Pixel Shift Count</A>\r
+is field defined for values 8, and 0-7, with 8 being the minimum shift\r
+amount and 7 being the maximum. In 256 color graphics modes, due to the\r
+way the hardware makes a 256 color value by combining 2 16-bit values,\r
+the <A HREF="attrreg.htm#13">Pixel Shift Count</A> field is only defined\r
+for values 0, 2, 4, and 6. Values 1, 3, 5, and 7 cause the screen to be\r
+distorted due to the hardware combining 4 bits from each of 2 adjacent\r
+pixels. The <A HREF="crtcreg.htm#08">Byte Panning</A> field is added to\r
+the <A HREF="crtcreg.htm#0D">Start Address Register</A> when determining\r
+the address of the top-left hand corner of the screen, and has the value\r
+from 0-3. Combined, both panning fields allow a shift of 15, 31, or 35\r
+pixels, dependent upon the video mode. Note that programming the <A HREF="attrreg.htm#13">Pixel\r
+Shift Count</A> field to an undefined value may cause undesired effects\r
+and these effects are not guaranteed to be identical on all chipsets, so\r
+it is best to be avoided.\r
+<BR> Pixel level scrolling is\r
+controlled by the <A HREF="crtcreg.htm#08">Preset Row Scan</A> field. This\r
+field may take any value from 0 up to the value of the <A HREF="crtcreg.htm#09">Maximum\r
+Scan Line</A> field; anything greater causes interesting artifacts (there\r
+is no guarantee that the result will be the same for all VGA chipsets.)\r
+Incrementing this value will shift the screen upwards by one scan line,\r
+allowing for smooth scrolling in modes where the Offset field does not\r
+provide precise control.\r
+\r
+<P><A NAME="split"></A><B>Split-screen Operation</B>\r
+<BR> The VGA hardware provides\r
+the ability to specify a horizontal division which divides the screen into\r
+two windows which can start at separate display memory addresses. In addition,\r
+it provides the facility for panning the top window independent of the\r
+bottom window. The hardware does not provide for split-screen modes where\r
+multiple video modes are possible in one display screen as provided by\r
+some non-VGA graphics controllers. In addition, there are some limitations,\r
+the first being that the bottom window's starting display memory address\r
+is fixed at 0. This means that (unless you are using split screen mode\r
+to duplicate memory on purpose) the bottom screen must be located first\r
+in memory and followed by the top. The second limitation is that either\r
+both windows are panned by the same amount, or only the top window pans,\r
+in which case, the bottom window's panning values are fixed at 0. Another\r
+limitation is that the <A HREF="crtcreg.htm#08">Preset Row Scan</A> field\r
+only applies to the top window -- the bottom window has an effective Preset\r
+Row Scan value of 0.\r
+<BR> The Line Compare field in\r
+the VGA, of which bit 9 is in the <A HREF="crtcreg.htm#09">Maximum Scan\r
+Line Register</A>, bit 8 is in the <A HREF="crtcreg.htm#07">Overflow Register</A>,\r
+and bits 7-0 are in the <A HREF="crtcreg.htm#18">Line Compare Register</A>,\r
+specifies the scan line address of the horizontal division. When the line\r
+counter reaches the value in the Line Compare Register, the current scan\r
+line start address is reset to 0. If the <A HREF="attrreg.htm#10">Pixel\r
+Panning Mode</A> field is set to 1 then the <A HREF="attrreg.htm#13">Pixel\r
+Shift Count</A> and <A HREF="crtcreg.htm#08">Byte Panning</A> fields are\r
+reset to 0 for the remainder of the display cycle allowing the top window\r
+to pan while the bottom window remains fixed. Otherwise, both windows pan\r
+by the same amount.\r
+<BR> \r
+\r
+<P>Notice: All trademarks used or referred to on this page are the property\r
+of their respective owners.\r
+<BR>All pages are Copyright © 1997, 1998, J. D. Neal, except where\r
+noted. Permission for utilization and distribution is subject to the terms\r
+of the <A HREF="license.htm">FreeVGA Project Copyright License</A>.\r
+</BODY>\r
+</HTML>\r
projects / pintos-anon / blobdiff