Use 9600 bps for Pintos serial, to match the speed used by the loader.

[pintos-anon] / src / userprog / tss.c

diff --git a/src/userprog/tss.c b/src/userprog/tss.c
index cddad93b54964b7795dba95b586dfa96aa8083eb..f8ed9a90ab0d7cf0cad855842cac8570a1e720f6 100644 (file)
--- a/src/userprog/tss.c
+++ b/src/userprog/tss.c
@@ -2,8 +2,9 @@
 #include <debug.h>
 #include <stddef.h>
 #include "userprog/gdt.h"
-#include "threads/mmu.h"
+#include "threads/thread.h"
 #include "threads/palloc.h"
+#include "threads/vaddr.h"
 
 /* The Task-State Segment (TSS).
 
@@ -41,11 +42,12 @@
        not in use, so we can always use that.  Thus, when the
        scheduler switches threads, it also changes the TSS's
        stack pointer to point to the new thread's kernel stack.
-       (The call is in schedule_tail() in thread.c.)
+       (The call is in thread_schedule_tail() in thread.c.)
 
-   See [IA32-v3] 6.2.1 for a description of the TSS and 5.12.1
-   for a description of when and how stack switching occurs
-   during an interrupt. */
+   See [IA32-v3a] 6.2.1 "Task-State Segment (TSS)" for a
+   description of the TSS.  See [IA32-v3a] 5.12.1 "Exception- or
+   Interrupt-Handler Procedures" for a description of when and
+   how stack switching occurs during an interrupt. */
 struct tss
   {
     uint16_t back_link, :16;
@@ -81,9 +83,9 @@ tss_init (void)
      few fields of it are ever referenced, and those are the only
      ones we initialize. */
   tss = palloc_get_page (PAL_ASSERT | PAL_ZERO);
-  tss->esp0 = ptov(0x20000);
   tss->ss0 = SEL_KDSEG;
   tss->bitmap = 0xdfff;
+  tss_update ();
 }
 
 /* Returns the kernel TSS. */
@@ -94,10 +96,11 @@ tss_get (void)
   return tss;
 }
 
-/* Sets the ring 0 stack pointer in the TSS to ESP0. */
+/* Sets the ring 0 stack pointer in the TSS to point to the end
+   of the thread stack. */
 void
-tss_set_esp0 (uint8_t *esp0) 
+tss_update (void) 
 {
   ASSERT (tss != NULL);
-  tss->esp0 = esp0;
+  tss->esp0 = (uint8_t *) thread_current () + PGSIZE;
 }