{
uint32_t *pd = palloc_get_page (0);
if (pd != NULL)
- memcpy (pd, base_page_dir, PGSIZE);
+ memcpy (pd, init_page_dir, PGSIZE);
return pd;
}
if (pd == NULL)
return;
- ASSERT (pd != base_page_dir);
+ ASSERT (pd != init_page_dir);
for (pde = pd; pde < pd + pd_no (PHYS_BASE); pde++)
if (*pde & PTE_P)
{
ASSERT (pg_ofs (upage) == 0);
ASSERT (pg_ofs (kpage) == 0);
ASSERT (is_user_vaddr (upage));
- ASSERT (vtop (kpage) >> PTSHIFT < ram_pages);
- ASSERT (pd != base_page_dir);
+ ASSERT (vtop (kpage) >> PTSHIFT < init_ram_pages);
+ ASSERT (pd != init_page_dir);
pte = lookup_page (pd, upage, true);
pagedir_activate (uint32_t *pd)
{
if (pd == NULL)
- pd = base_page_dir;
+ pd = init_page_dir;
/* Store the physical address of the page directory into CR3
aka PDBR (page directory base register). This activates our
new page tables immediately. See [IA32-v2a] "MOV--Move
to/from Control Registers" and [IA32-v3a] 3.7.5 "Base
Address of the Page Directory". */
- asm volatile ("movl %0, %%cr3" :: "r" (vtop (pd)));
+ asm volatile ("movl %0, %%cr3" : : "r" (vtop (pd)) : "memory");
}
/* Returns the currently active page directory. */