#define CR0_PG 0x80000000 /* Paging. */
#define CR0_WP 0x00010000 /* Write-Protect enable in kernel mode. */
-# Code runs in real mode, which is a 16-bit segment.
.globl start
start:
+
+# Code runs in real mode, which is a 16-bit segment.
.code16
-# Disable interrupts.
-# String instructions go upward.
+# Disable interrupts, because we will not be prepared to handle them
+# in protected mode until much later.
+# String instructions go upward (e.g. for "rep stosl" below).
cli
cld
-# Set up data segments and stack.
+# Set up data segments.
subw %ax, %ax
movw %ax, %es
movw %ax, %ds
+# Set up stack segment.
# Stack grows downward starting from us.
-# We don't ever use the stack so this is strictly speaking
-# unnecessary.
+# We don't ever use the stack, but we call into the BIOS,
+# which might.
movw %ax, %ss
movw $0x7c00, %sp
movb $0x88, %ah
int $0x15
jc panic
+ cli # BIOS might have enabled interrupts
addl $1024, %eax # Total kB memory
cmp $0x10000, %eax # Cap at 64 MB
jbe 1f
mov $0x10000, %eax
1: shrl $2, %eax # Total 4 kB pages
- movl %eax, ram_pages
+ movl %eax, ram_pgs
#### Create temporary page directory and page table and set page
#### directory base register.
# Add PDEs to point to PTEs for the first 64 MB of RAM.
# Also add identical PDEs starting at LOADER_PHYS_BASE.
-# See [IA32-v3] section 3.7.6 for a description of the bits in %eax.
+# See [IA32-v3a] section 3.7.6 "Page-Directory and Page-Table Entries"
+# for a description of the bits in %eax.
+
movl $0x11007, %eax
movl $0x11, %ecx
loop 1b
# Set up one-to-map linear to physical map for the first 64 MB of RAM.
-# See [IA32-v3] section 3.7.6 for a description of the bits in %eax.
+# See [IA32-v3a] section 3.7.6 "Page-Directory and Page-Table Entries"
+# for a description of the bits in %eax.
movw $0x1100, %ax
movw %ax, %es
#### Switch to protected mode.
-# First we turn off interrupts because we don't set up an IDT.
-
- cli
+# Note that interrupts are still off.
-# Then we point the GDTR to our GDT. Protected mode requires a GDT.
+# Point the GDTR to our GDT. Protected mode requires a GDT.
# We need a data32 prefix to ensure that all 32 bits of the GDT
# descriptor are loaded (default is to load only 24 bits).
movl $1, %ebx
movl $LOADER_KERN_BASE + LOADER_PHYS_BASE, %edi
+
+# Disable interrupt delivery by IDE controller, because we will be
+# polling for data.
+# (If we don't do this, Bochs 2.2.6 will never deliver any IDE
+# interrupt to us later after we reset the interrupt controller during
+# boot, even if we also reset the IDE controller.)
+
+ movw $0x3f6, %dx
+ movb $0x02, %al
+ outb %al, %dx
+
read_sector:
# Poll status register while controller busy.
.long gdt + LOADER_PHYS_BASE # address gdt
#### Fatal error.
-#### Print panicmsg (with help from the BIOS) and spin.
+#### Print panic_message (with help from the BIOS) and spin.
panic: .code16 # We only panic in real mode.
- movw $panicmsg, %si
+ movw $panic_message, %si
movb $0xe, %ah
subb %bh, %bh
1: lodsb
int $0x10
jmp 1b
-panicmsg:
- .ascii "Loader panic!\r\n"
+panic_message:
+ .ascii "Panic!"
.byte 0
-#### Memory size in 4 kB pages.
- .org LOADER_RAM_PAGES - LOADER_BASE
-ram_pages:
+#### Physical memory size in 4 kB pages.
+#### This is initialized by the loader and read by the kernel.
+ .org LOADER_RAM_PGS - LOADER_BASE
+ram_pgs:
.long 0
-#### Command-line arguments inserted by another utility.
-#### The loader doesn't use these, but we note their
-#### location here for easy reference.
- .org LOADER_CMD_LINE - LOADER_BASE
-cmd_line:
+#### Command-line arguments and their count.
+#### This is written by the `pintos' utility and read by the kernel.
+#### The loader itself does not do anything with the command line.
+ .org LOADER_ARG_CNT - LOADER_BASE
+arg_cnt:
+ .long 0
+ .org LOADER_ARGS - LOADER_BASE
+args:
.fill 0x80, 1, 0
-#### Boot-sector signature for BIOS inspection.
- .org LOADER_BIOS_SIG - LOADER_BASE
+#### Boot-sector signature.
+#### The BIOS checks that this is set properly.
+ .org LOADER_SIG - LOADER_BASE
.word 0xaa55