#define CR0_PE 0x00000001 /* Protection Enable. */
#define CR0_EM 0x00000004 /* (Floating-point) Emulation. */
#define CR0_PG 0x80000000 /* Paging. */
#define CR0_PE 0x00000001 /* Protection Enable. */
#define CR0_EM 0x00000004 /* (Floating-point) Emulation. */
#define CR0_PG 0x80000000 /* Paging. */
#### Get memory size, via interrupt 15h function 88h. Returns CF
#### clear if successful, with AX = (kB of physical memory) - 1024.
#### This only works for memory sizes <= 65 MB, which should be fine
#### Get memory size, via interrupt 15h function 88h. Returns CF
#### clear if successful, with AX = (kB of physical memory) - 1024.
#### This only works for memory sizes <= 65 MB, which should be fine
- jc panic # Carry flag set on error
- addl $1024, %eax # Total kB
- shrl $2, %eax # Total 4 kB pages
+ jc panic
+ addl $1024, %eax # Total kB memory
+ cmp $0x10000, %eax # Cap at 64 MB
+ jbe 1f
+ mov $0x10000, %eax
+1: shrl $2, %eax # Total 4 kB pages
movl %eax, ram_pages
#### Create temporary page directory and page table and set page
#### directory base register.
# Create page directory at 64 kB and fill with zeroes.
movl %eax, ram_pages
#### Create temporary page directory and page table and set page
#### directory base register.
# Create page directory at 64 kB and fill with zeroes.
-# Set PDEs for 0 and LOADER_PHYS_BASE to point to the page table.
-# See comments near the PG_* macros in paging.h for a description of
-# the values stored here.
+# Add PDEs to point to PTEs for the first 64 MB of RAM.
+# Also add identical PDEs starting at LOADER_PHYS_BASE.
+# See [IA32-v3] section 3.7.6 for a description of the bits in %eax.
#### Load kernel starting at physical address LOADER_KERN_BASE by
#### frobbing the IDE controller directly.
#### Load kernel starting at physical address LOADER_KERN_BASE by
#### frobbing the IDE controller directly.