-#include "debug.h"
-#include "io.h"
-#include "interrupt.h"
-#include "lib.h"
-#include "synch.h"
-#include "timer.h"
-
-#define reg_data(CHANNEL) ((CHANNEL)->reg_base + 0)
-#define reg_error(CHANNEL) ((CHANNEL)->reg_base + 1)
-#define reg_nsect(CHANNEL) ((CHANNEL)->reg_base + 2)
-#define reg_lbal(CHANNEL) ((CHANNEL)->reg_base + 3)
-#define reg_lbam(CHANNEL) ((CHANNEL)->reg_base + 4)
-#define reg_lbah(CHANNEL) ((CHANNEL)->reg_base + 5)
-#define reg_device(CHANNEL) ((CHANNEL)->reg_base + 6)
-#define reg_status(CHANNEL) ((CHANNEL)->reg_base + 7)
-#define reg_command(CHANNEL) reg_status (CHANNEL)
-#define reg_ctl(CHANNEL) ((CHANNEL)->reg_base + 0x206)
-#define reg_alt_status(CHANNEL) reg_ctl (CHANNEL)
+#include <stdio.h>
+#include "devices/timer.h"
+#include "threads/io.h"
+#include "threads/interrupt.h"
+#include "threads/synch.h"
+
+/* The code in this file is an interface to an ATA (IDE)
+ controller. It attempts to comply to [ATA-3]. */
+
+/* ATA command block port addresses. */
+#define reg_data(CHANNEL) ((CHANNEL)->reg_base + 0) /* Data. */
+#define reg_error(CHANNEL) ((CHANNEL)->reg_base + 1) /* Error. */
+#define reg_nsect(CHANNEL) ((CHANNEL)->reg_base + 2) /* Sector Count. */
+#define reg_lbal(CHANNEL) ((CHANNEL)->reg_base + 3) /* LBA 0:7. */
+#define reg_lbam(CHANNEL) ((CHANNEL)->reg_base + 4) /* LBA 15:8. */
+#define reg_lbah(CHANNEL) ((CHANNEL)->reg_base + 5) /* LBA 23:16. */
+#define reg_device(CHANNEL) ((CHANNEL)->reg_base + 6) /* Device/LBA 27:24. */
+#define reg_status(CHANNEL) ((CHANNEL)->reg_base + 7) /* Status (r/o). */
+#define reg_command(CHANNEL) reg_status (CHANNEL) /* Command (w/o). */
+
+/* ATA control block port addresses.
+ (If we supported non-legacy ATA controllers this would not be
+ flexible enough, but it's fine for what we do.) */
+#define reg_ctl(CHANNEL) ((CHANNEL)->reg_base + 0x206) /* Control (w/o). */
+#define reg_alt_status(CHANNEL) reg_ctl (CHANNEL) /* Alt Status (r/o). */