8 #include "threads/loader.h"
10 /* Virtual to physical translation works like this on an x86:
12 - The top 10 bits of the virtual address (bits 22:31) are used
13 to index into the page directory. If the PDE is marked
14 "present," the physical address of a page table is read from
15 the PDE thus obtained. If the PDE is marked "not present"
16 then a page fault occurs.
18 - The next 10 bits of the virtual address (bits 12:21) are
19 used to index into the page table. If the PTE is marked
20 "present," the physical address of a data page is read from
21 the PTE thus obtained. If the PTE is marked "not present"
22 then a page fault occurs.
24 - The bottom 12 bits of the virtual address (bits 0:11) are
25 added to the data page's physical base address, producing
26 the final physical address.
30 +--------------------------------------------------------------------+
31 | Page Directory Index | Page Table Index | Page Offset |
32 +--------------------------------------------------------------------+
34 _______/ _______/ _____/
36 / Page Directory / Page Table / Data Page
37 / .____________. / .____________. / .____________.
38 |1,023|____________| |1,023|____________| | |____________|
39 |1,022|____________| |1,022|____________| | |____________|
40 |1,021|____________| |1,021|____________| \__\|____________|
41 |1,020|____________| |1,020|____________| /|____________|
44 | | . | /| . | \ | . |
45 \____\| . |_ | . | | | . |
46 /| . | \ | . | | | . |
49 |____________| | |____________| | |____________|
50 4|____________| | 4|____________| | |____________|
51 3|____________| | 3|____________| | |____________|
52 2|____________| | 2|____________| | |____________|
53 1|____________| | 1|____________| | |____________|
54 0|____________| \__\0|____________| \____\|____________|
58 #define MASK(SHIFT, CNT) (((1ul << (CNT)) - 1) << (SHIFT))
60 /* Page offset (bits 0:11). */
61 #define PGSHIFT 0 /* First offset bit. */
62 #define PGBITS 12 /* Number of offset bits. */
63 #define PGMASK MASK(PGSHIFT, PGBITS)
64 #define PGSIZE (1 << PGBITS)
66 /* Page table (bits 12:21). */
67 #define PTSHIFT PGBITS /* First page table bit. */
68 #define PTBITS 10 /* Number of page table bits. */
69 #define PTMASK MASK(PTSHIFT, PTBITS)
71 /* Page directory (bits 22:31). */
72 #define PDSHIFT (PTSHIFT + PTBITS) /* First page dir bit. */
73 #define PDBITS 10 /* Number of page dir bits. */
74 #define PDMASK MASK(PDSHIFT, PDBITS)
76 /* Offset within a page. */
77 static inline unsigned pg_ofs (void *va) { return (uintptr_t) va & PGMASK; }
79 /* Virtual page number. */
80 static inline uintptr_t pg_no (void *va) { return (uintptr_t) va >> PTSHIFT; }
82 /* Round up to nearest page boundary. */
83 static inline void *pg_round_up (void *va) {
84 return (void *) (((uintptr_t) va + PGSIZE - 1) & ~PGMASK);
87 /* Round down to nearest page boundary. */
88 static inline void *pg_round_down (void *va) {
89 return (void *) ((uintptr_t) va & ~PGMASK);
92 #define PHYS_BASE ((void *) LOADER_PHYS_BASE)
94 /* Returns kernel virtual address at which physical address PADDR
97 ptov (uintptr_t paddr)
99 ASSERT ((void *) paddr < PHYS_BASE);
101 return (void *) (paddr + PHYS_BASE);
104 /* Returns physical address at which kernel virtual address VADDR
106 static inline uintptr_t
109 ASSERT (vaddr >= PHYS_BASE);
111 return (uintptr_t) vaddr - (uintptr_t) PHYS_BASE;
114 /* Page directories and page tables.
116 For more information see [IA32-v3] pages 3-23 to 3-28.
118 PDEs and PTEs share a common format:
121 +------------------------------------+------------------------+
122 | Physical Address | Flags |
123 +------------------------------------+------------------------+
125 In a PDE, the physical address points to a page table.
126 In a PTE, the physical address points to a data or code page.
127 The important flags are listed below.
128 When a PDE or PTE is not "present", the other flags are
130 A PDE or PTE that is initialized to 0 will be interpreted as
131 "not present", which is just fine. */
132 #define PG_P 0x1 /* 1=present, 0=not present. */
133 #define PG_W 0x2 /* 1=read/write, 0=read-only. */
134 #define PG_U 0x4 /* 1=user/kernel, 0=kernel only. */
135 #define PG_A 0x20 /* 1=accessed, 0=not acccessed. */
136 #define PG_D 0x40 /* 1=dirty, 0=not dirty (PTEs only). */
138 /* Obtains page directory index from a virtual address. */
139 static inline uintptr_t pd_no (void *va) { return (uintptr_t) va >> PDSHIFT; }
141 /* Returns a PDE that points to page table PT. */
142 static inline uint32_t pde_create (uint32_t *pt) {
143 ASSERT (pg_ofs (pt) == 0);
144 return vtop (pt) | PG_U | PG_P | PG_W;
147 /* Returns a pointer to the page table that page directory entry
148 PDE, which must "present", points to. */
149 static inline uint32_t *pde_get_pt (uint32_t pde) {
151 return ptov (pde & ~PGMASK);
154 /* Obtains page table index from a virtual address. */
155 static inline unsigned pt_no (void *va) {
156 return ((uintptr_t) va & PTMASK) >> PTSHIFT;
159 /* Returns a PTE that points to PAGE.
160 The PTE's page is readable.
161 If WRITABLE is true then it will be writable as well.
162 The page will be usable only by ring 0 code (the kernel). */
163 static inline uint32_t pte_create_kernel (uint32_t *page, bool writable) {
164 ASSERT (pg_ofs (page) == 0);
165 return vtop (page) | PG_P | (writable ? PG_W : 0);
168 /* Returns a PTE that points to PAGE.
169 The PTE's page is readable.
170 If WRITABLE is true then it will be writable as well.
171 The page will be usable by both user and kernel code. */
172 static inline uint32_t pte_create_user (uint32_t *page, bool writable) {
173 return pte_create_kernel (page, writable) | PG_U;
176 /* Returns a pointer to the page that page table entry PTE, which
177 must "present", points to. */
178 static inline void *pte_get_page (uint32_t pte) {
180 return ptov (pte & ~PGMASK);
183 #endif /* threads/mmu.h */