1 /* This file is derived from source code used in MIT's 6.828
2 course. The original copyright notice is reproduced in full
6 * Copyright (C) 1997 Massachusetts Institute of Technology
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41 #include "threads/loader.h"
45 #### This code should be stored in the first sector of the hard disk.
46 #### When the BIOS runs, it loads this code at physical address
47 #### 0x7c00-0x7e00 (512 bytes). Then it jumps to the beginning of it,
48 #### in real mode. This code switches into protected mode (32-bit
49 #### mode) so that all of memory can accessed, loads the kernel into
50 #### memory, and jumps to the first byte of the kernel, where start.S
53 /* Flags in control register 0. */
54 #define CR0_PE 0x00000001 /* Protection Enable. */
55 #define CR0_EM 0x00000004 /* (Floating-point) Emulation. */
56 #define CR0_PG 0x80000000 /* Paging. */
57 #define CR0_WP 0x00010000 /* Write-Protect enable in kernel mode. */
59 # Code runs in real mode, which is a 16-bit segment.
66 # String instructions go upward.
71 # Set up data segments.
77 # Set up stack segment.
78 # Stack grows downward starting from us.
79 # We don't ever use the stack, but we call into the BIOS,
85 #### Enable A20. Address line 20 is tied to low when the machine
86 #### boots, which prevents addressing memory about 1 MB. This code
89 # Poll status register while busy.
95 # Send command for writing output port.
100 # Poll status register while busy.
111 #### Get memory size, via interrupt 15h function 88h. Returns CF
112 #### clear if successful, with AX = (kB of physical memory) - 1024.
113 #### This only works for memory sizes <= 65 MB, which should be fine
114 #### for our purposes. We cap memory at 64 MB because that's all we
115 #### prepare page tables for, below.
120 cli # BIOS might have enabled interrupts
121 addl $1024, %eax # Total kB memory
122 cmp $0x10000, %eax # Cap at 64 MB
125 1: shrl $2, %eax # Total 4 kB pages
128 #### Create temporary page directory and page table and set page
129 #### directory base register.
131 # Create page directory at 64 kB and fill with zeroes.
139 # Add PDEs to point to PTEs for the first 64 MB of RAM.
140 # Also add identical PDEs starting at LOADER_PHYS_BASE.
141 # See [IA32-v3] section 3.7.6 for a description of the bits in %eax.
146 1: movl %eax, %es:(%di)
147 movl %eax, %es:LOADER_PHYS_BASE >> 20(%di)
152 # Set up one-to-map linear to physical map for the first 64 MB of RAM.
153 # See [IA32-v3] section 3.7.6 for a description of the bits in %eax.
160 1: movl %eax, %es:(%di)
165 # Set page directory base register.
170 #### Switch to protected mode.
172 # Note that interrupts are still off.
174 # Point the GDTR to our GDT. Protected mode requires a GDT.
175 # We need a data32 prefix to ensure that all 32 bits of the GDT
176 # descriptor are loaded (default is to load only 24 bits).
180 # Then we turn on the following bits in CR0:
181 # PE (Protect Enable): this turns on protected mode.
182 # PG (Paging): turns on paging.
183 # WP (Write Protect): if unset, ring 0 code ignores
184 # write-protect bits in page tables (!).
185 # EM (Emulation): forces floating-point instructions to trap.
186 # We don't support floating point.
189 orl $CR0_PE | CR0_PG | CR0_WP | CR0_EM, %eax
192 # We're now in protected mode in a 16-bit segment. The CPU still has
193 # the real-mode code segment cached in %cs's segment descriptor. We
194 # need to reload %cs, and the easiest way is to use a far jump.
195 # Because we're not in a 32-bit segment the data32 prefix is needed to
196 # jump to a 32-bit offset.
198 data32 ljmp $SEL_KCSEG, $1f + LOADER_PHYS_BASE
200 # We're now in protected mode in a 32-bit segment.
204 # Reload all the other segment registers and the stack pointer to
205 # point into our new GDT.
207 1: movw $SEL_KDSEG, %ax
213 movl $LOADER_PHYS_BASE + 0x30000, %esp
215 #### Load kernel starting at physical address LOADER_KERN_BASE by
216 #### frobbing the IDE controller directly.
219 movl $LOADER_KERN_BASE + LOADER_PHYS_BASE, %edi
222 # Poll status register while controller busy.
229 # Read a single sector.
235 # Sector number to write in low 28 bits.
236 # LBA mode, device 0 in top 4 bits.
239 andl $0x0fffffff, %eax
240 orl $0xe0000000, %eax
242 # Dump %eax to ports 0x1f3...0x1f6.
250 # READ command to command register.
256 # Poll status register while controller busy.
262 # Poll status register until data ready.
277 cmpl $KERNEL_LOAD_PAGES*8 + 1, %ebx
280 #### Jump to kernel entry point.
282 movl $LOADER_PHYS_BASE + LOADER_KERN_BASE, %eax
289 .quad 0x0000000000000000 # null seg
290 .quad 0x00cf9a000000ffff # code seg
291 .quad 0x00cf92000000ffff # data seg
294 .word 0x17 # sizeof (gdt) - 1
295 .long gdt + LOADER_PHYS_BASE # address gdt
298 #### Print panic_message (with help from the BIOS) and spin.
300 panic: .code16 # We only panic in real mode.
301 movw $panic_message, %si
314 #### Physical memory size in 4 kB pages.
315 #### This is initialized by the loader and read by the kernel.
316 .org LOADER_RAM_PGS - LOADER_BASE
320 #### Command-line arguments and their count.
321 #### This is written by the `pintos' utility and read by the kernel.
322 #### The loader itself does not do anything with the command line.
323 .org LOADER_ARG_CNT - LOADER_BASE
326 .org LOADER_ARGS - LOADER_BASE
330 #### Boot-sector signature.
331 #### The BIOS checks that this is set properly.
332 .org LOADER_SIG - LOADER_BASE