1 /* This file is derived from source code used in MIT's 6.828
2 course. The original copyright notice is reproduced in full
6 * Copyright (C) 1997 Massachusetts Institute of Technology
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41 #include "threads/loader.h"
42 /*#include "threads/mmu.h"*/
46 #### This code should be stored in the first sector of the hard disk.
47 #### When the BIOS runs, it loads this code at physical address
48 #### 0x7c00-0x7e00 (512 bytes). Then it jumps to the beginning of it,
49 #### in real mode. This code switches into protected mode (32-bit
50 #### mode) so that all of memory can accessed, loads the kernel into
51 #### memory, and jumps to the first byte of the kernel, where start.S
54 /* Flags in control register 0 */
55 #define CR0_PE 0x00000001 /* Protection Enable. */
56 #define CR0_EM 0x00000004 /* (Floating-point) Emulation. */
57 #define CR0_PG 0x80000000 /* Paging. */
58 #define CR0_WP 0x00010000 /* Write-Protect enable in kernel mode. */
60 # Code runs in real mode, which is a 16-bit segment.
67 # String instructions go upward.
72 # Set up data segments and stack.
78 # Stack grows downward starting from us.
79 # We don't ever use the stack so this is strictly speaking
85 #### Enable A20. Address line 20 is tied to low when the machine
86 #### boots, which prevents addressing memory about 1 MB. This code
89 # Poll status register while busy.
95 # Send command for writing output port.
100 # Poll status register while busy.
111 #### Get memory size, via interrupt 15h function 88h. Returns CF
112 #### clear if successful, with AX = (kB of physical memory) - 1024.
113 #### This only works for memory sizes <= 65 MB, which should be fine
114 #### for our purposes.
118 jc panic # Carry flag set on error
119 addl $1024, %eax # Total kB
120 shrl $2, %eax # Total 4 kB pages
123 #### Create temporary page directory and page table and set page
124 #### directory base register.
126 # Create page directory at 64 kB and fill with zeroes.
135 # Set PDEs for 0 and LOADER_PHYS_BASE to point to the page table.
136 # See comments near the PG_* macros in paging.h for a description of
137 # the values stored here.
141 movl %eax, %es:LOADER_PHYS_BASE >> 20
143 # Initialize page table.
151 # Set page directory base register.
156 #### Switch to protected mode.
158 # First we turn off interrupts because we don't set up an IDT.
162 # Then we point the GDTR to our GDT. Protected mode requires a GDT.
163 # We need a data32 prefix to ensure that all 32 bits of the GDT
164 # descriptor are loaded (default is to load only 24 bits).
168 # Then we turn on the following bits in CR0:
169 # PE (Protect Enable): this turns on protected mode.
170 # PG (Paging): turns on paging.
171 # WP (Write Protect): if unset, ring 0 code ignores
172 # write-protect bits in page tables (!).
173 # EM (Emulation): forces floating-point instructions to trap.
174 # We don't support floating point.
177 orl $CR0_PE | CR0_PG | CR0_WP | CR0_EM, %eax
180 # We're now in protected mode in a 16-bit segment. The CPU still has
181 # the real-mode code segment cached in %cs's segment descriptor. We
182 # need to reload %cs, and the easiest way is to use a far jump.
183 # Because we're not in a 32-bit segment the data32 prefix is needed to
184 # jump to a 32-bit offset.
186 data32 ljmp $SEL_KCSEG, $1f + LOADER_PHYS_BASE
188 # We're now in protected mode in a 32-bit segment.
192 # Reload all the other segment registers and the stack pointer to
193 # point into our new GDT.
195 1: movw $SEL_KDSEG, %ax
201 movl $LOADER_PHYS_BASE + 0x20000, %esp
203 #### Load kernel starting at physical address LOADER_KERN_BASE by
204 #### frobbing the IDE controller directly.
207 movl $LOADER_KERN_BASE + LOADER_PHYS_BASE, %edi
210 # Poll status register while controller busy.
217 # Read a single sector.
223 # Sector number to write in low 28 bits.
224 # LBA mode, device 0 in top 4 bits.
227 andl $0x0fffffff, %eax
228 orl $0xe0000000, %eax
230 # Dump %eax to ports 0x1f3...0x1f6.
238 # READ command to command register.
244 # Poll status register while controller busy.
250 # Poll status register until data ready.
265 cmpl $KERNEL_LOAD_PAGES*8 + 1, %ebx
268 #### Jump to kernel entry point.
270 movl $LOADER_PHYS_BASE + LOADER_KERN_BASE, %eax
277 .quad 0x0000000000000000 # null seg
278 .quad 0x00cf9a000000ffff # code seg
279 .quad 0x00cf92000000ffff # data seg
282 .word 0x17 # sizeof (gdt) - 1
283 .long gdt + LOADER_PHYS_BASE # address gdt
286 #### Print panicmsg (with help from the BIOS) and spin.
288 panic: .code16 # We only panic in real mode.
299 .ascii "Loader panic!\r\n"
302 #### Memory size in 4 kB pages.
303 .org LOADER_RAM_PAGES - LOADER_BASE
307 #### Command-line arguments inserted by another utility.
308 #### The loader doesn't use these, but we note their
309 #### location here for easy reference.
310 .org LOADER_CMD_LINE - LOADER_BASE
314 #### Boot-sector signature for BIOS inspection.
315 .org LOADER_BIOS_SIG - LOADER_BASE