1 /* This file is derived from source code used in MIT's 6.828
2 course. The original copyright notice is reproduced in full
6 * Copyright (C) 1997 Massachusetts Institute of Technology
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41 #include "threads/loader.h"
43 .intel_syntax noprefix
47 #### This code should be stored in the first sector of the hard disk.
48 #### When the BIOS runs, it loads this code at physical address
49 #### 0x7c00-0x7e00 (512 bytes). Then it jumps to the beginning of it,
50 #### in real mode. This code switches into protected mode (32-bit
51 #### mode) so that all of memory can accessed, loads the kernel into
52 #### memory, and jumps to the first byte of the kernel, where start.S
55 /* Flags in control register 0. */
56 #define CR0_PE 0x00000001 /* Protection Enable. */
57 #define CR0_EM 0x00000004 /* (Floating-point) Emulation. */
58 #define CR0_PG 0x80000000 /* Paging. */
59 #define CR0_WP 0x00010000 /* Write-Protect enable in kernel mode. */
61 # Code runs in real mode, which is a 16-bit segment.
68 # String instructions go upward.
73 # Set up data segments.
79 # Set up stack segment.
80 # Stack grows downward starting from us.
81 # We don't ever use the stack so this is strictly speaking
87 #### Enable A20. Address line 20 is tied to low when the machine
88 #### boots, which prevents addressing memory about 1 MB. This code
91 # Poll status register while busy.
97 # Send command for writing output port.
102 # Poll status register while busy.
113 #### Get memory size, via interrupt 15h function 88h, which returns CF
114 #### clear if successful, with AX = (kB of physical memory) - 1024.
115 #### This only works for memory sizes <= 65 MB, which should be fine
116 #### for our purposes. We cap memory at 64 MB because that's all we
117 #### prepare page tables for, below.
122 add eax, 1024 # Total kB memory
123 cmp eax, 0x10000 # Cap at 64 MB
126 1: shr eax, 2 # Total 4 kB pages
129 #### Create temporary page directory and page table and set page
130 #### directory base register.
132 # Create page directory at 64 kB and fill with zeroes.
140 # Add PDEs to point to PTEs for the first 64 MB of RAM.
141 # Also add identical PDEs starting at LOADER_PHYS_BASE.
142 # See [IA32-v3] section 3.7.6 for a description of the bits in eax.
144 # A bug in some versions of GAS prevents us from using the straightforward
145 # mov es:[di + LOADER_PHYS_BASE / 1024 / 1024], eax
146 # so we calculate the displacement in bx instead.
151 mov ebx, LOADER_PHYS_BASE
154 mov es:[bx + di], eax
159 # Set up one-to-map linear to physical map for the first 64 MB of RAM.
160 # See [IA32-v3] section 3.7.6 for a description of the bits in eax.
172 # Set page directory base register.
177 #### Switch to protected mode.
179 # Then we point the GDTR to our GDT. Protected mode requires a GDT.
180 # We need a data32 prefix to ensure that all 32 bits of the GDT
181 # descriptor are loaded (default is to load only 24 bits).
185 # Then we turn on the following bits in CR0:
186 # PE (Protect Enable): this turns on protected mode.
187 # PG (Paging): turns on paging.
188 # WP (Write Protect): if unset, ring 0 code ignores
189 # write-protect bits in page tables (!).
190 # EM (Emulation): forces floating-point instructions to trap.
191 # We don't support floating point.
194 or eax, CR0_PE + CR0_PG + CR0_WP + CR0_EM
197 # We're now in protected mode in a 16-bit segment. The CPU still has
198 # the real-mode code segment cached in cs's segment descriptor. We
199 # need to reload cs, and the easiest way is to use a far jump.
200 # Because we're not in a 32-bit segment the data32 prefix is needed to
201 # jump to a 32-bit offset.
203 data32 ljmp SEL_KCSEG, 1f + LOADER_PHYS_BASE
205 # We're now in protected mode in a 32-bit segment.
209 # Reload all the other segment registers and the stack pointer to
210 # point into our new GDT.
218 mov esp, LOADER_PHYS_BASE + 0x30000
220 #### Load kernel starting at physical address LOADER_KERN_BASE by
221 #### frobbing the IDE controller directly.
224 mov edi, LOADER_KERN_BASE + LOADER_PHYS_BASE
227 # Poll status register while controller busy.
234 # Read a single sector.
240 # Sector number to write in low 28 bits.
241 # LBA mode, device 0 in top 4 bits.
247 # Dump eax to ports 0x1f3...0x1f6.
255 # READ command to command register.
261 # Poll status register while controller busy.
267 # Poll status register until data ready.
282 cmp ebx, KERNEL_LOAD_PAGES*8 + 1
285 #### Jump to kernel entry point.
287 mov eax, LOADER_PHYS_BASE + LOADER_KERN_BASE
294 .quad 0x0000000000000000 # null seg
295 .quad 0x00cf9a000000ffff # code seg
296 .quad 0x00cf92000000ffff # data seg
299 .word 0x17 # sizeof (gdt) - 1
300 .long gdt + LOADER_PHYS_BASE # address gdt
303 #### Print panicmsg (with help from the BIOS) and spin.
305 panic: .code16 # We only panic in real mode.
306 mov si, offset panicmsg
316 .ascii "Loader panic!\r\n"
319 #### Memory size in 4 kB pages.
320 .org LOADER_RAM_PAGES - LOADER_BASE
324 #### Command-line arguments inserted by another utility.
325 #### The loader doesn't use these, but we note their
326 #### location here for easy reference.
327 .org LOADER_CMD_LINE - LOADER_BASE
331 #### Boot-sector signature for BIOS inspection.
332 .org LOADER_BIOS_SIG - LOADER_BASE