3 <META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
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4 <META NAME="Author" CONTENT="Joshua Neal">
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5 <META NAME="Description" CONTENT="Pure VGA/SVGA hardware programming (registers, identification, and otherlow-level stuff.)">
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6 <META NAME="KeyWords" CONTENT="VGA SVGA hardware video programming">
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7 <TITLE>FreeVGA--Special Effects Hardware</TITLE>
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11 <CENTER><A HREF="../home.htm">Home</A> <A HREF="#intro">Intro</A> <A HREF="#window">Windowing</A>
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12 <A HREF="#paging">Paging</A> <A HREF="#smooth">Smooth Scrolling</A> <A HREF="#split">Split-Screen</A>
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13 <A HREF="vga.htm#general">Back
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14 <HR WIDTH="100%"></A><B>Hardware Level VGA and SVGA Video Programming Information
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17 <CENTER>Special Effects Hardware
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18 <HR WIDTH="100%"></CENTER>
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22 <A HREF="#intro">Introduction</A> -- describes the capabilities of the
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23 VGA special effects hardware.</LI>
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26 <A HREF="#window">Windowing</A> -- provides rough panning and scrolling
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27 of a larger virtual image.</LI>
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30 <A HREF="#paging">Paging</A> -- provides the ability to switch between
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31 multiple screens rapidly.</LI>
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34 <A HREF="#smooth">Smooth Panning and Scrolling</A> -- provides more precise
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35 control when panning and scrolling.</LI>
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38 <A HREF="#split">Split-Screen Operation</A> -- provides a horizontal division
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39 which allows independent scrolling and panning of the top window.</LI>
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41 <A NAME="intro"></A><B>Introduction</B>
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42 <BR> This section describes the
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43 capabilities of the VGA hardware that can be used to implement special
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44 effects such as windowing, paging, smooth panning and scrolling, and split
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45 screen operation.. These functions are probably the least utilized of all
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46 of the VGA's capabilities, possibly because most texts devoted to video
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47 hardware provide only brief documentation. Also, the video BIOS provides
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48 no support for these capabilities so the VGA card must be programmed at
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49 the hardware level in order to utilize these capabilities. Windowing allows
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50 a program to view a portion of an image in display memory larger than the
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51 current display resolution, providing rough panning and scrolling. Paging
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52 allows multiple display screens to be stored in the display memory allowing
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53 rapid switching between them. Smooth panning and scrolling works in conjunction
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54 with windowing to provide more precise control of window position. Split-screen
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55 operation allows the creation of a horizontal division on the screen that
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56 creates a window below that remains fixed in place independent of the panning
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57 and scrolling of the window above. These features can be combined to provide
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58 powerful control of the display with minimal demand on the host CPU.
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60 <P><A NAME="window"></A><B>Windowing</B>
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61 <BR> The VGA hardware has the
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62 ability treat the display as a window which can pan and/or scroll across
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63 an image larger than the screen, which is used by some windowing systems
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64 to provide a virtual scrolling desktop, and by some games and assembly
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65 demos to provide scrolling. Some image viewers use this to allow viewing
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66 of images larger than the screen. This capability is not limited to graphics
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67 mode; some terminal programs use this capability to provide a scroll-back
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68 buffer, and some editors use this to provide an editing screen wider than
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70 <BR> This feature can be implemented
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71 by brute force by simply copying the portion of the image to be displayed
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72 to the screen. Doing this, however takes significant processor horsepower.
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73 For example, scrolling a 256 color 320x200 display at 30 frames per second
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74 by brute force requires a data transfer rate of 1.92 megabytes/second.
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75 However, using the hardware capability of the VGA the same operation would
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76 require a data transfer rate of only 120 bytes/second. Obviously there
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77 is an advantage to using the VGA hardware. However, there are some limitations--one
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78 being that the entire screen must scroll (or the top portion of the screen
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79 if split-screen mode is used.) and the other being that the maximum size
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80 of the virtual image is limited to the amount of video memory accessible,
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81 although it is possible to redraw portions of the display memory to display
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82 larger virtual images.
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83 <BR> In text mode, windowing
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84 allows panning at the character resolution. In graphics mode, windowing
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85 allows panning at 8-bit resolution and scrolling at scan-line resolution.
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86 For more precise control, see <A HREF="#smooth">Smooth Panning and Scrolling</A>
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87 below. Because the VGA BIOS and most programming environment's graphics
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88 libraries do not support windowing, you must modify or write your own routines
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89 to write to the display for functions such as writing text or graphics.
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90 This section assumes that you have the ability to work with the custom
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91 resolutions possible when windowing is used.
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92 <BR> In order to understand virtual
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93 resolutions it is necessary to understand how the VGA's <A HREF="crtcreg.htm#0C">Start
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94 Address High Register</A>, <A HREF="crtcreg.htm#0D">Start Address Low Register</A>,
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95 and <A HREF="crtcreg.htm#13">Offset</A> field work. Because display memory
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96 in the VGA is accessed by a 32-bit bus, a 16-bit address is sufficient
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97 to uniquely identify any location in the VGA's 256K address space. The
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98 <A HREF="crtcreg.htm#0C">Start Address High Register</A> and <A HREF="crtcreg.htm#0D">Start
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99 Address Low Register</A> provide such an address. This address is used
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100 to specify either the location of the first character in text mode or the
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101 position of the first byte of pixels in graphics mode. At the end of the
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102 vertical retrace, the current line start address is loaded with this value.
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103 This causes one scan line of pixels or characters to be output starting
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104 at this address. At the beginning of the next scan-line (or character row
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105 in text mode) the value of the <A HREF="crtcreg.htm#13">Offset Register</A>
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106 multiplied by the current memory address size * 2 is added to the current
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107 line start address. The <A HREF="crtcreg.htm#14">Double-Word Addressing</A>
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108 field and the <A HREF="crtcreg.htm#17">Word/Byte</A> field specify the
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109 current memory address size. If the value of the <A HREF="crtcreg.htm#14">Double-Word
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110 Addressing</A> field is 1, then the current memory address size is four
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111 (double-word). Otherwise, the <A HREF="crtcreg.htm#17">Word/Byte</A> field
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112 specifies the current memory address size. If the value of the <A HREF="crtcreg.htm#17">Word/Byte</A>
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113 field is 0 then the current memory address size is 2 (word) otherwise,
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114 the current memory address size is 1 (byte).
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115 <BR> Normally in graphics modes,
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116 the offset register is programmed to represent (after multiplication) the
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117 number of bytes in a scan line. This means that (unless a CGA/MDA emulation
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118 mode is in effect) scan lines will be arranged sequentially in memory with
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119 no space in between, allowing for the most compact representation in display
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120 memory. However, this does not have to be the case--in fact, by increasing
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121 the value of the offset register we can leave "extra space" between lines.
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122 This is what provides for virtual widths. By programming the offset register
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123 to the value of the equation:
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125 <P> <B>Offset = VirtualWidth
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126 / ( PixelsPerAddress * MemoryAddressSize * 2 )</B>
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128 <P>VirtualWidth is the width of the virtual resolution in pixels, and PixelsPerAddress
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129 is the number of pixels per display memory address (1, 2, 4 or 8) depending
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130 on the current video mode. For virtual text modes, the offset register
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131 is programmed with the value of the equation:
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133 <P> <B>Offset = VirtualWidth
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134 / ( MemoryAddressSize * 2 )</B>
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136 <P>In text mode, there is always one character per display memory address.
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137 In standard CGA compatible text modes, MemoryAddressSize is 2 (word).
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138 <BR> After you have programmed
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139 the new offset, the screen will now display only a portion of a virtual
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140 display. The screen will display the number of scan-lines as specified
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141 by the current mode. If the screen reaches the last byte of memory, the
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142 next byte of memory will wrap around to the first byte of memory. Remember
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143 that the Start Address specifies the display memory address of the upper-left
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144 hand character or pixel. Thus the maximum height of a virtual screen depends
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145 on the width of the virtual screen. By increasing this by the number of
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146 bytes in a scan-line (or character row), the display will scroll one scan-line
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147 or character row vertically downwards. By increasing the Start Address
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148 by less than the number of bytes in a scan line, you can move the virtual
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149 window horizontally to the right. If the virtual width is the same as the
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150 actual width, one can create a vertical scrolling mode. This is used sometimes
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151 as an "elevator" mode or to provide rapid scrollback capability in text
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152 mode. If the virtual height is the same as the actual height, then only
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153 horizontal panning is possible, sometimes called "panoramic" mode. In any
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154 case, the equation for calculating the Start Address is:
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156 <P><B> Start Address = StartingOffset
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157 + Y * BytesPerVirtualRow + X</B>
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159 <P>Y is the vertical position, from 0 to the value of the VitrualHeight
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160 - ActualHeight. X is the horizontal position, from 0 to the value of BytesPerVirtualRow
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161 - BytesPerActualRow . These ranges prevent wrapping around to the left
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162 side of the screen, although you may find it useful to use the wrap-around
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163 for whatever your purpose. Note that the wrap-around simply starts displaying
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164 the next row/scan-line rather than the current one, so is not that useful
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165 (except when using programming techniques that take this factor into account.)
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166 Normally StartingOffset is 0, but if paging or split-screen mode is being
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167 used, or even if you simply want to relocate the screen, you must change
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168 the starting offset to the address of the upper-left hand pixel of the
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170 <BR> For example, a 512x300 virtual
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171 screen in a 320x200 16-color 1 bit/pixel planar display would require 512
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172 pixels / 8 pixels/byte = 64 bytes per row and 64 bytes/row * 300 lines
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173 = 19200 bytes per screen. Assuming the VGA is in byte addressing mode,
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174 this means that we need to program the offset register <A HREF="crtcreg.htm#13">Offset</A>
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175 field with 512 pixels / (8 pixels/byte * 1 * 2) = 32 (20h). Adding one
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176 to the start address will move the display screen to the right eight pixels.
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177 More precise control is provided by the smooth scrolling mechanism. Adding
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178 64 to the start address will move the virtual screen down one scan line.
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179 See the following chart which shows the virtual screen when the start address
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180 is calculated with an X and Y of 0:
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181 <CENTER><A HREF="virtual.txt"><IMG SRC="virtual.gif" ALT="Click for Textified Virtual Screen Mode Example" HEIGHT=256 WIDTH=376></A></CENTER>
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184 <P><A NAME="paging"></A><B>Paging</B>
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185 <BR> The video display memory
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186 may be able to hold more than one screen of data (or virtual screen if
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187 virtual resolutions are used.) These multiple screens, called pages, allows
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188 rapid switching between them. As long as they both have the same actual
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189 (and virtual if applicable) resolution, simply changing the Start Address
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190 as given by the <A HREF="crtcreg.htm#0C">Start Address High Register</A>
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191 and <A HREF="crtcreg.htm#0D">Start Address Low Register</A> pair to point
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192 to the memory address of the first byte of the page (or set the StartingOffset
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193 term in the equation for virtual resolutions to the first memory address
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194 of the page.) If they have different virtual widths, then the <A HREF="crtcreg.htm#13">Offset</A>
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195 field must be reprogrammed. It is possible to store both graphics and text
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196 pages simultaneously in memory, in addition to different graphics mode
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197 pages. In this case, the video mode must be changed when changing pages.
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198 In addition, in text mode the Cursor Location must be reprogrammed for
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199 each page if it is to be displayed. Also paging allows for double buffering
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200 of the display -- the CPU can write to one page while the VGA hardware
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201 is displaying another. By switching between pages during the vertical retrace
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202 period, flicker free screen updates can be implemented.
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203 <BR> An example of paging is
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204 that used by the VGA BIOS in the 80x25 text mode. Each page of text takes
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205 up 2000 memory address locations, and the VGA uses a 32K memory aperture,
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206 with the Odd/Even addressing enabled. Because Odd/Even addressing is enabled,
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207 each page of text takes up 4000 bytes in host memory, thus 32768 / 4000
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208 = 8 (rounded down) pages can be provided and can be accessed at one time
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209 by the CPU. Each page starts at a multiple of 4096 (1000h). Because the
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210 display controller circuitry works independent of the host memory access
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211 mode, this means that each page starts at a display address that is a multiple
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212 of 2048 (800h), thus the Starting Address is programmed to the value obtained
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213 by multiplying the page to be displayed by 2048 (800h). See the following
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214 chart which shows the arrangement of these pages in display memory:
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216 <CENTER><A HREF="paging.txt"><IMG SRC="paging.gif" ALT="Click here to display a textified Paging Memory Utilization Example" HEIGHT=256 WIDTH=376></A></CENTER>
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219 <P><A NAME="smooth"></A><B>Smooth Panning and Scrolling</B>
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220 <BR> Because the Start Address
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221 field only provides for scrolling and panning at the memory address level,
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222 more precise panning and scrolling capability is needed to scroll at the
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223 pixel level as multiple pixels may reside at the same memory address especially
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224 in text mode where the Start Address field only allows panning and scrolling
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225 at the character level.
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226 <BR> Pixel level panning is controlled
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227 by the <A HREF="attrreg.htm#13">Pixel Shift Count</A> and <A HREF="crtcreg.htm#08">Byte
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228 Panning</A> fields. The <A HREF="attrreg.htm#13">Pixel Shift Count</A>
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229 field specifies the number of pixels to shift left. In all graphics modes
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230 and text modes except 9 dot text modes and 256 color graphics modes, the
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231 <A HREF="attrreg.htm#13">Pixel Shift Count</A> is defined for values 0-7.
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232 This provides the pixel level control not provided by the <A HREF="crtcreg.htm#0D">Start
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233 Address Register</A> or the <A HREF="crtcreg.htm#08">Byte Panning</A> fields.
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234 In 9 dot text modes the <A HREF="attrreg.htm#13">Pixel Shift Count</A>
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235 is field defined for values 8, and 0-7, with 8 being the minimum shift
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236 amount and 7 being the maximum. In 256 color graphics modes, due to the
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237 way the hardware makes a 256 color value by combining 2 16-bit values,
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238 the <A HREF="attrreg.htm#13">Pixel Shift Count</A> field is only defined
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239 for values 0, 2, 4, and 6. Values 1, 3, 5, and 7 cause the screen to be
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240 distorted due to the hardware combining 4 bits from each of 2 adjacent
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241 pixels. The <A HREF="crtcreg.htm#08">Byte Panning</A> field is added to
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242 the <A HREF="crtcreg.htm#0D">Start Address Register</A> when determining
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243 the address of the top-left hand corner of the screen, and has the value
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244 from 0-3. Combined, both panning fields allow a shift of 15, 31, or 35
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245 pixels, dependent upon the video mode. Note that programming the <A HREF="attrreg.htm#13">Pixel
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246 Shift Count</A> field to an undefined value may cause undesired effects
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247 and these effects are not guaranteed to be identical on all chipsets, so
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248 it is best to be avoided.
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249 <BR> Pixel level scrolling is
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250 controlled by the <A HREF="crtcreg.htm#08">Preset Row Scan</A> field. This
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251 field may take any value from 0 up to the value of the <A HREF="crtcreg.htm#09">Maximum
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252 Scan Line</A> field; anything greater causes interesting artifacts (there
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253 is no guarantee that the result will be the same for all VGA chipsets.)
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254 Incrementing this value will shift the screen upwards by one scan line,
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255 allowing for smooth scrolling in modes where the Offset field does not
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256 provide precise control.
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258 <P><A NAME="split"></A><B>Split-screen Operation</B>
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259 <BR> The VGA hardware provides
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260 the ability to specify a horizontal division which divides the screen into
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261 two windows which can start at separate display memory addresses. In addition,
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262 it provides the facility for panning the top window independent of the
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263 bottom window. The hardware does not provide for split-screen modes where
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264 multiple video modes are possible in one display screen as provided by
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265 some non-VGA graphics controllers. In addition, there are some limitations,
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266 the first being that the bottom window's starting display memory address
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267 is fixed at 0. This means that (unless you are using split screen mode
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268 to duplicate memory on purpose) the bottom screen must be located first
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269 in memory and followed by the top. The second limitation is that either
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270 both windows are panned by the same amount, or only the top window pans,
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271 in which case, the bottom window's panning values are fixed at 0. Another
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272 limitation is that the <A HREF="crtcreg.htm#08">Preset Row Scan</A> field
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273 only applies to the top window -- the bottom window has an effective Preset
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274 Row Scan value of 0.
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275 <BR> The Line Compare field in
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276 the VGA, of which bit 9 is in the <A HREF="crtcreg.htm#09">Maximum Scan
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277 Line Register</A>, bit 8 is in the <A HREF="crtcreg.htm#07">Overflow Register</A>,
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278 and bits 7-0 are in the <A HREF="crtcreg.htm#18">Line Compare Register</A>,
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279 specifies the scan line address of the horizontal division. When the line
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280 counter reaches the value in the Line Compare Register, the current scan
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281 line start address is reset to 0. If the <A HREF="attrreg.htm#10">Pixel
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282 Panning Mode</A> field is set to 1 then the <A HREF="attrreg.htm#13">Pixel
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283 Shift Count</A> and <A HREF="crtcreg.htm#08">Byte Panning</A> fields are
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284 reset to 0 for the remainder of the display cycle allowing the top window
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285 to pan while the bottom window remains fixed. Otherwise, both windows pan
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286 by the same amount.
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289 <P>Notice: All trademarks used or referred to on this page are the property
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290 of their respective owners.
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291 <BR>All pages are Copyright © 1997, 1998, J. D. Neal, except where
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292 noted. Permission for utilization and distribution is subject to the terms
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293 of the <A HREF="license.htm">FreeVGA Project Copyright License</A>.
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