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5 <META NAME="Description" CONTENT="Pure VGA/SVGA hardware programming (registers, identification, and other low-level stuff.)">
6 <META NAME="KeyWords" CONTENT="VGA SVGA hardware video programming">
7 <TITLE>VGA/SVGA Video Programming--Attribute Controller Registers</TITLE>
11 <CENTER><A HREF="../home.htm">Home</A> <A HREF="vga.htm#register">Back</A>
12 <HR WIDTH="100%"><B>Hardware Level VGA and SVGA Video Programming Information
15 <CENTER>Attribute Controller Registers
16 <HR WIDTH="100%"></CENTER>
19 <P> The Attribute Controller
20 Registers are accessed via a pair of registers, the Attribute Address/Data
21 Register and the Attribute Data Read Register. See the <A HREF="vgareg.htm">Accessing
22 the VGA Registers</A> section for more detals. The Address/Data Register
23 is located at port 3C0h and the Data Read Register is located at port 3C1h.
25 <TABLE BORDER WIDTH="600" CELLPADING="2" >
26 <CAPTION><A NAME="3C0"></A><B>Attribute Address Register(3C0h)</B></CAPTION>
28 <TR ALIGN=CENTER VALIGN=CENTER>
46 <TR ALIGN=CENTER VALIGN=CENTER>
51 <TD WIDTH="75">PAS</TD>
53 <TD COLSPAN="5" WIDTH="375">Attribute Address</TD>
57 <UL><B>PAS -- Palette Address Source<BR>
58 </B>"<I>This bit is set to 0 to load color values to the registers in the
59 internal palette. It is set to 1 for normal operation of the attribute
60 controller. Note: Do not access the internal palette while this bit is
61 set to 1. While this bit is 1, the Type 1 video subsystem disables accesses
62 to the palette; however, the Type 2 does not, and the actual color value
63 addressed cannot be ensured.</I>"
65 <B>Attribute Address<BR>
66 </B>This field specifies the index value of the attribute register to be
70 <TABLE BORDER WIDTH="600" CELLPADING="2" >
71 <CAPTION ALIGN=TOP><A NAME="000F"></A><B>Palette Registers (Index 00-0Fh)</B></CAPTION>
73 <TR ALIGN=CENTER VALIGN=CENTER>
91 <TR ALIGN=CENTER VALIGN=CENTER>
96 <TD COLSPAN="6" WIDTH="450">Internal Palette Index</TD>
100 <UL><B>Internal Palette Index<BR>
101 </B>"<I>These 6-bit registers allow a dynamic mapping between the text
102 attribute or graphic color input value and the display color on the CRT
103 screen. When set to 1, this bit selects the appropriate color. The Internal
104 Palette registers should be modified only during the vertical retrace interval
105 to avoid problems with the displayed image. These internal palette values
106 are sent off-chip to the video DAC, where they serve as addresses into
107 the DAC registers.</I>"</UL>
109 <TABLE BORDER WIDTH="600" CELLPADING="2" >
110 <CAPTION ALIGN=TOP><A NAME="10"></A><B>Attribute Mode Control Register
111 (Index 10h)</B></CAPTION>
113 <TR ALIGN=CENTER VALIGN=CENTER>
114 <TD WIDTH="75">7</TD>
116 <TD WIDTH="75">6</TD>
118 <TD WIDTH="75">5</TD>
120 <TD WIDTH="75">4</TD>
122 <TD WIDTH="75">3</TD>
124 <TD WIDTH="75">2</TD>
126 <TD WIDTH="75">1</TD>
128 <TD WIDTH="75">0</TD>
131 <TR ALIGN=CENTER VALIGN=CENTER>
132 <TD WIDTH="75">P54S</TD>
134 <TD WIDTH="75">8BIT</TD>
136 <TD WIDTH="75">PPM</TD>
140 <TD WIDTH="75">BLINK</TD>
142 <TD WIDTH="75">LGE</TD>
144 <TD WIDTH="75">MONO</TD>
146 <TD WIDTH="75">ATGE</TD>
150 <UL><B>P54S -- Palette Bits 5-4 Select<BR>
151 </B>"<I>This bit selects the source for the P5 and P4 video bits that act
152 as inputs to the video DAC. When this bit is set to 0, P5 and P4 are the
153 outputs of the Internal Palette registers. When this bit is set to 1, P5
154 and P4 are bits 1 and 0 of the Color Select register.</I>"
155 <BR><B>8BIT -- 8-bit Color Enable<BR>
156 </B>"<I>When this bit is set to 1, the video data is sampled so that eight
157 bits are available to select a color in the 256-color mode (0x13). This
158 bit is set to 0 in all other modes.</I>"
160 <B>PPM -- Pixel Panning Mode</B></LI>
162 <BR>This field allows the upper half of the screen to pan independently
163 of the lower screen. If this field is set to 0 then nothing special occurs
164 during a successful line compare (see the <A HREF="crtcreg.htm#18">Line
165 Compare</A> field.) If this field is set to 1, then upon a successful line
166 compare, the bottom portion of the screen is displayed as if the <A HREF="attrreg.htm#13">Pixel
167 Shift Count</A> and <A HREF="crtcreg.htm#08">Byte Panning</A> fields are
169 <BR><B>BLINK - Blink Enable<BR>
170 </B>"<I>When this bit is set to 0, the most-significant bit of the attribute
171 selects the background intensity (allows 16 colors for background). When
172 set to 1, this bit enables blinking.</I>"
174 <B>LGA - Line Graphics Enable</B></LI>
176 <BR>This field is used in 9 bit wide character modes to provide continuity
177 for the horizontal line characters in the range C0h-DFh. If this field
178 is set to 0, then the 9th column of these characters is replicated from
179 the 8th column of the character. Otherwise, if it is set to 1 then the
180 9th column is set to the background like the rest of the characters.
182 <B>MONO - Monochrome Emulation</B></LI>
184 <BR>This field is used to store your favorite bit. According to IBM, "When
185 this bit is set to 1, monochrome emulation mode is selected. When this
186 bit is set to 0, color |emulation mode is selected." It is present and
187 programmable in all of the hardware but it apparently does nothing. The
188 internal palette is used to provide monochrome emulation instead.
190 <B>ATGE - Attribute Controller Graphics Enable<BR>
191 </B>"<I>When set to 1, this bit selects the graphics mode of operation.</I>"</LI>
194 <TABLE BORDER WIDTH="600" CELLPADING="2" >
195 <CAPTION><A NAME="11"></A><B>Overscan Color Register (Index 11h)</B></CAPTION>
197 <TR ALIGN=CENTER VALIGN=CENTER>
198 <TD WIDTH="75">7</TD>
200 <TD WIDTH="75">6</TD>
202 <TD WIDTH="75">5</TD>
204 <TD WIDTH="75">4</TD>
206 <TD WIDTH="75">3</TD>
208 <TD WIDTH="75">2</TD>
210 <TD WIDTH="75">1</TD>
212 <TD WIDTH="75">0</TD>
215 <TR ALIGN=CENTER VALIGN=CENTER>
216 <TD COLSPAN="8" WIDTH="600">Overscan Palette Index</TD>
220 <UL><B>Overscan Palette Index<BR>
221 </B>"<I>These bits select the border color used in the 80-column alphanumeric
222 modes and in the graphics modes other than modes 4, 5, and D. (Selects
223 a color from one of the DAC registers.)</I>"</UL>
225 <TABLE BORDER WIDTH="600" CELLPADING="2" >
226 <CAPTION ALIGN=TOP><A NAME="12"></A><B>Color Plane Enable Register (Index
229 <TR ALIGN=CENTER VALIGN=CENTER>
230 <TD WIDTH="75">7</TD>
232 <TD WIDTH="75">6</TD>
234 <TD WIDTH="75">5</TD>
236 <TD WIDTH="75">4</TD>
238 <TD WIDTH="75">3</TD>
240 <TD WIDTH="75">2</TD>
242 <TD WIDTH="75">1</TD>
244 <TD WIDTH="75">0</TD>
247 <TR ALIGN=CENTER VALIGN=CENTER>
256 <TD COLSPAN="4" WIDTH="300">Color Plane Enable</TD>
262 <B>Color Plane Enable<BR>
263 </B>"<I>Setting a bit to 1, enables the corresponding display-memory color
267 <TABLE BORDER WIDTH="600" CELLPADING="2" >
268 <CAPTION ALIGN=TOP><A NAME="13"></A><B>Horizontal Pixel Panning Register
269 (Index 13h)</B></CAPTION>
271 <TR ALIGN=CENTER VALIGN=CENTER>
272 <TD WIDTH="75">7</TD>
274 <TD WIDTH="75">6</TD>
276 <TD WIDTH="75">5</TD>
278 <TD WIDTH="75">4</TD>
280 <TD WIDTH="75">3</TD>
282 <TD WIDTH="75">2</TD>
284 <TD WIDTH="75">1</TD>
286 <TD WIDTH="75">0</TD>
289 <TR ALIGN=CENTER VALIGN=CENTER>
298 <TD COLSPAN="4" WIDTH="300">Pixel Shift Count</TD>
302 <UL><B>Pixel Shift Count<BR>
303 </B>"<I>These bits select the number of pels that the video data is shifted
304 to the left. PEL panning is available in both alphanumeric and graphics
307 <TABLE BORDER WIDTH="600" CELLPADING="2" >
308 <CAPTION ALIGN=TOP><A NAME="14"></A><B>Color Select Register (Index 14h)</B></CAPTION>
310 <TR ALIGN=CENTER VALIGN=CENTER>
311 <TD WIDTH="75">7</TD>
313 <TD WIDTH="75">6</TD>
315 <TD WIDTH="75">5</TD>
317 <TD WIDTH="75">4</TD>
319 <TD WIDTH="75">3</TD>
321 <TD WIDTH="75">2</TD>
323 <TD WIDTH="75">1</TD>
325 <TD WIDTH="75">0</TD>
328 <TR ALIGN=CENTER VALIGN=CENTER>
337 <TD COLSPAN="2" WIDTH="150">Color Select 7-6</TD>
339 <TD COLSPAN="2" WIDTH="150">Color Select 5-4</TD>
343 <UL><B>Color Select 7-6<BR>
344 </B>"<I>In modes other than mode 13 hex, these are the two most-significant
345 bits of the 8-bit digital color value to the video DAC. In mode 13 hex,
346 the 8-bit attribute is the digital color value to the video DAC. These
347 bits are used to rapidly switch between sets of colors in the video DAC.</I>"
348 <BR><B>Color Select 5-4<BR>
349 </B>"<I>These bits can be used in place of the P4 and P5 bits from the
350 Internal Palette registers to form the 8-bit digital color value
351 to the video DAC. Selecting these bits is done in the Attribute Mode Control
352 register (index 0x10). These bits are used to rapidly switch between colors
353 sets within the video DAC.</I>"</UL>
354 Notice: All trademarks used or referred to on this page are the property
355 of their respective owners.
356 <BR>All pages are Copyright © 1997, 1998, J. D. Neal, except where
357 noted. Permission for utilization and distribution is subject to the terms
358 of the <A HREF="license.htm">FreeVGA Project Copyright License</A>.