- Added an OpenFlow extension which allows the "output" action to accept
NXM fields.
- Added an OpenFlow extension for flexible learning.
+ - Bumped number of NXM registers from four to five.
- ovs-appctl:
- New "version" command to determine version of running daemon.
- If no argument is provided for "cfm/show", displays detailed
#define NXM_NX_REG2_W NXM_HEADER_W(0x0001, 2, 4)
#define NXM_NX_REG3 NXM_HEADER (0x0001, 3, 4)
#define NXM_NX_REG3_W NXM_HEADER_W(0x0001, 3, 4)
+#define NXM_NX_REG4 NXM_HEADER (0x0001, 4, 4)
+#define NXM_NX_REG4_W NXM_HEADER_W(0x0001, 4, 4)
/* Tunnel ID.
*
* failures in places which likely need to be updated. */
#define FLOW_WC_SEQ 1
-#define FLOW_N_REGS 4
+#define FLOW_N_REGS 5
BUILD_ASSERT_DECL(FLOW_N_REGS <= NXM_NX_MAX_REGS);
/* Used for struct flow's dl_type member for frames that have no Ethernet
BUILD_ASSERT_DECL(sizeof(struct flow) == FLOW_SIG_SIZE + FLOW_PAD_SIZE);
/* Remember to update FLOW_WC_SEQ when changing 'struct flow'. */
-BUILD_ASSERT_DECL(FLOW_SIG_SIZE == 116 && FLOW_WC_SEQ == 1);
+BUILD_ASSERT_DECL(FLOW_SIG_SIZE == 120 && FLOW_WC_SEQ == 1);
int flow_extract(struct ofpbuf *, ovs_be64 tun_id, uint16_t in_port,
struct flow *);
};
/* Remember to update FLOW_WC_SEQ when updating struct flow_wildcards. */
-BUILD_ASSERT_DECL(sizeof(struct flow_wildcards) == 72 && FLOW_WC_SEQ == 1);
+BUILD_ASSERT_DECL(sizeof(struct flow_wildcards) == 76 && FLOW_WC_SEQ == 1);
void flow_wildcards_init_catchall(struct flow_wildcards *);
void flow_wildcards_init_exact(struct flow_wildcards *);
REGISTER(3),
#endif
#if FLOW_N_REGS > 4
+ REGISTER(4),
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
case MFF_REG3:
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
return !wc->reg_masks[mf->id - MFF_REG0];
case MFF_REG3:
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
mask->be32 = htonl(wc->reg_masks[mf->id - MFF_REG0]);
case MFF_REG3:
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
case MFF_ETH_SRC:
case MFF_REG3:
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
value->be32 = htonl(flow->regs[0]);
case MFF_REG3:
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
#if FLOW_N_REGS > 0
break;
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+ cls_rule_set_reg_masked(rule, 4, 0, 0);
+ break;
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
case MFF_REG3:
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
cls_rule_set_reg_masked(rule, mf->id - MFF_REG0,
case MFF_REG3:
#endif
#if FLOW_N_REGS > 4
+ case MFF_REG4:
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
case MFF_ETH_SRC:
MFF_REG3, /* be32 */
#endif
#if FLOW_N_REGS > 4
+ MFF_REG4, /* be32 */
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
#if FLOW_N_REGS >= 4
NXM_READ_REGISTER(3);
#endif
-#if FLOW_N_REGS > 4
+#if FLOW_N_REGS >= 5
+ NXM_READ_REGISTER(4);
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
#if FLOW_N_REGS >= 4
NXM_WRITE_REGISTER(3);
#endif
-#if FLOW_N_REGS > 4
+#if FLOW_N_REGS >= 5
+ NXM_WRITE_REGISTER(4);
+#endif
+#if FLOW_N_REGS > 5
#error
#endif
#if FLOW_N_REGS >= 4
DEFINE_FIELD_M(NX_REG3, MFF_REG3, true)
#endif
-#if FLOW_N_REGS > 4
+#if FLOW_N_REGS >= 5
+DEFINE_FIELD_M(NX_REG4, MFF_REG4, true)
+#endif
+#if FLOW_N_REGS > 5
#error
#endif