X-Git-Url: https://pintos-os.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fuserprog%2Fpagedir.c;h=000aefea700be64ded51049debd81ffae0199328;hb=f0ad7eb8b43516c7a2999fd217ec85d954dfc791;hp=39a8f0a3af286f9227cf7d7226f19b7cd18e50e4;hpb=e6a09e68f6d8b9c63adf8206777495dc3cd2a8b1;p=pintos-anon

diff --git a/src/userprog/pagedir.c b/src/userprog/pagedir.c
index 39a8f0a..000aefe 100644
--- a/src/userprog/pagedir.c
+++ b/src/userprog/pagedir.c
@@ -6,19 +6,31 @@
 #include "threads/mmu.h"
 #include "threads/palloc.h"
 
+static uint32_t *active_pd (void);
+
+/* Creates a new page directory that has mappings for kernel
+   virtual addresses, but none for user virtual addresses.
+   Returns the new page directory, or a null pointer if memory
+   allocation fails. */
 uint32_t *
 pagedir_create (void) 
 {
-  uint32_t *pd = palloc_get (0);
+  uint32_t *pd = palloc_get_page (0);
   memcpy (pd, base_page_dir, PGSIZE);
   return pd;
 }
 
+/* Destroys page directory PD, freeing all the pages it
+   references. */
 void
 pagedir_destroy (uint32_t *pd) 
 {
   uint32_t *pde;
 
+  if (pd == NULL)
+    return;
+
+  ASSERT (pd != base_page_dir);
   for (pde = pd; pde < pd + pd_no (PHYS_BASE); pde++)
     if (*pde & PG_P) 
       {
@@ -27,30 +39,39 @@ pagedir_destroy (uint32_t *pd)
         
         for (pte = pt; pte < pt + PGSIZE / sizeof *pte; pte++)
           if (*pte & PG_P) 
-            palloc_free (pte_get_page (*pte));
-        palloc_free (pt);
+            palloc_free_page (pte_get_page (*pte));
+        palloc_free_page (pt);
       }
-  palloc_free (pd);
+  palloc_free_page (pd);
 }
 
+/* Returns the address of the page table entry for user virtual
+   address UADDR in page directory PD.
+   If PD does not have a page table for UADDR, behavior varies
+   based on CREATE:
+   if CREATE is true, then a new page table is created and a
+   pointer into it is returned,
+   otherwise a null pointer is returned.
+   Also returns a null pointer if UADDR is a kernel address. */
 static uint32_t *
-lookup_page (uint32_t *pd, void *upage, bool create)
+lookup_page (uint32_t *pd, void *uaddr, bool create)
 {
-  uint32_t *pt;
-  uint32_t *pde;
+  uint32_t *pt, *pde;
 
   ASSERT (pd != NULL);
-  ASSERT (pg_ofs (upage) == 0);
-  ASSERT (upage < PHYS_BASE);
 
-  /* Check for a page table for UPAGE.
+  /* Make sure it's a user address. */
+  if (uaddr >= PHYS_BASE)
+    return NULL;
+
+  /* Check for a page table for UADDR.
      If one is missing, create one if requested. */
-  pde = pd + pd_no (upage);
+  pde = pd + pd_no (uaddr);
   if (*pde == 0) 
     {
       if (create)
         {
-          pt = palloc_get (PAL_ZERO);
+          pt = palloc_get_page (PAL_ZERO);
           if (pt == NULL) 
             return NULL; 
       
@@ -62,16 +83,26 @@ lookup_page (uint32_t *pd, void *upage, bool create)
 
   /* Return the page table entry. */
   pt = pde_get_pt (*pde);
-  return &pt[pt_no (upage)];
+  return &pt[pt_no (uaddr)];
 }
 
+/* Adds a mapping from user virtual address UPAGE to kernel
+   virtual address KPAGE in page directory PD.
+   UPAGE must not already be mapped.
+   If WRITABLE is true, the new page is read/write;
+   otherwise it is read-only.
+   Returns true if successful, false if memory allocation
+   failed. */
 bool
 pagedir_set_page (uint32_t *pd, void *upage, void *kpage,
                   bool writable) 
 {
   uint32_t *pte;
 
+  ASSERT (pg_ofs (upage) == 0);
   ASSERT (pg_ofs (kpage) == 0);
+  ASSERT (upage < PHYS_BASE);
+  ASSERT (pagedir_get_page (pd, upage) == NULL);
 
   pte = lookup_page (pd, upage, true);
   if (pte != NULL) 
@@ -83,25 +114,96 @@ pagedir_set_page (uint32_t *pd, void *upage, void *kpage,
     return false;
 }
 
+/* Returns the kernel virtual address that user virtual address
+   UADDR is mapped to in PD, or a null pointer if there is no
+   mapping. */
 void *
-pagedir_get_page (uint32_t *pd, void *upage) 
+pagedir_get_page (uint32_t *pd, const void *uaddr) 
 {
-  uint32_t *pte = lookup_page (pd, upage, false);
-  return pte != NULL && *pte != 0 ? pte_get_page (*pte) : NULL;
+  uint32_t *pte = lookup_page (pd, (void *) uaddr, false);
+  return (pte != NULL && *pte != 0
+          ? (uint8_t *) pte_get_page (*pte) + pg_ofs (uaddr)
+          : NULL);
 }
 
+/* Clears any mapping for user virtual address UPAGE in page
+   directory PD.
+   UPAGE need not already be mapped. */
 void
-pagedir_clear_page (uint32_t *pd, void *upage)
+pagedir_clear_page (uint32_t *pd, void *upage) 
 {
   uint32_t *pte = lookup_page (pd, upage, false);
-  if (pte != NULL)
-    *pte = 0;
+  if (pte != NULL && *pte != 0)
+    {
+      *pte = 0;
+
+      if (active_pd () == pd) 
+        {
+          /* We cleared a page-table entry in the active page
+             table, so we have to invalidate the TLB.  See
+             [IA32-v3], section 3.11. */
+          pagedir_activate (pd);
+        }
+    }
+
+}
+
+/* Returns true if the PTE for user virtual page UPAGE in PD is
+   dirty, that is, if the page has been modified since the PTE
+   was installed.
+   Returns false if PD contains no PDE for UPAGE. */
+bool
+pagedir_test_dirty (uint32_t *pd, const void *upage) 
+{
+  uint32_t *pte = lookup_page (pd, (void *) upage, false);
+  return pte != NULL && (*pte & PG_D) != 0;
+}
+
+/* Returns true if the PTE for user virtual page UPAGE in PD has
+   been accessed recently, that is, between the time the PTE was
+   installed and the last time it was cleared.
+   Returns false if PD contains no PDE for UPAGE. */
+bool
+pagedir_test_accessed (uint32_t *pd, const void *upage) 
+{
+  uint32_t *pte = lookup_page (pd, (void *) upage, false);
+  return pte != NULL && (*pte & PG_A) != 0;
+}
+
+/* Resets the accessed bit in the PTE for user virtual page UPAGE
+   in PD. */
+void
+pagedir_clear_accessed (uint32_t *pd, const void *upage) 
+{
+  uint32_t *pte = lookup_page (pd, (void *) upage, false);
+  if (pte != NULL) 
+    *pte &= ~(uint32_t) PG_A;
 }
 
+/* Loads page directory PD into the CPU's page directory base
+   register. */
 void
 pagedir_activate (uint32_t *pd) 
 {
   if (pd == NULL)
     pd = base_page_dir;
+
+  /* Store the physical address of the page directory into CR3
+     aka PDBR (page directory base register).  This activates our
+     new page tables immediately.  See [IA32-v2a] "MOV--Move
+     to/from Control Registers" and [IA32-v3] 3.7.5. */
   asm volatile ("movl %0,%%cr3" :: "r" (vtop (pd)));
 }
+
+/* Returns the currently active page directory. */
+static uint32_t *
+active_pd (void) 
+{
+  uint32_t *pd;
+
+  /* Copy CR3, the page directory base register (PDBR), into `pd'
+     for us to exmaine.  See [IA32-v2a] "MOV--Move to/from
+     Control Registers" and [IA32-v3] 3.7.5. */
+  asm ("movl %%cr3,%0" : "=r" (pd));
+  return pd;
+}