X-Git-Url: https://pintos-os.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fthreads%2Fio.h;h=cf9eee01a2174af6e5682f74f611a92b1b0baa89;hb=4742fa3312bdc0d43cd8a11775c7605a9f57eb5a;hp=39a135dcc23e46abfa21551a1b8f1c13753a9cf5;hpb=8890454391fff2c64646032f97908de71d68d0cb;p=pintos-anon diff --git a/src/threads/io.h b/src/threads/io.h index 39a135d..cf9eee0 100644 --- a/src/threads/io.h +++ b/src/threads/io.h @@ -1,5 +1,45 @@ -#ifndef HEADER_IO_H -#define HEADER_IO_H 1 +/* This file is derived from source code used in MIT's 6.828 + course. The original copyright notice is reproduced in full + below. */ + +/* + * Copyright (C) 1997 Massachusetts Institute of Technology + * + * This software is being provided by the copyright holders under the + * following license. By obtaining, using and/or copying this software, + * you agree that you have read, understood, and will comply with the + * following terms and conditions: + * + * Permission to use, copy, modify, distribute, and sell this software + * and its documentation for any purpose and without fee or royalty is + * hereby granted, provided that the full text of this NOTICE appears on + * ALL copies of the software and documentation or portions thereof, + * including modifications, that you make. + * + * THIS SOFTWARE IS PROVIDED "AS IS," AND COPYRIGHT HOLDERS MAKE NO + * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED. BY WAY OF EXAMPLE, + * BUT NOT LIMITATION, COPYRIGHT HOLDERS MAKE NO REPRESENTATIONS OR + * WARRANTIES OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE OR + * THAT THE USE OF THE SOFTWARE OR DOCUMENTATION WILL NOT INFRINGE ANY + * THIRD PARTY PATENTS, COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS. COPYRIGHT + * HOLDERS WILL BEAR NO LIABILITY FOR ANY USE OF THIS SOFTWARE OR + * DOCUMENTATION. + * + * The name and trademarks of copyright holders may NOT be used in + * advertising or publicity pertaining to the software without specific, + * written prior permission. Title to copyright in this software and any + * associated documentation will at all times remain with copyright + * holders. See the file AUTHORS which should have accompanied this software + * for a list of all copyright holders. + * + * This file may be derived from previously copyrighted software. This + * copyright applies only to those changes made by the copyright + * holders listed in the AUTHORS file. The rest of this file is covered by + * the copyright notices, if any, listed below. + */ + +#ifndef THREADS_IO_H +#define THREADS_IO_H #include #include @@ -8,8 +48,9 @@ static inline uint8_t inb (uint16_t port) { + /* See [IA32-v2a] "IN". */ uint8_t data; - asm volatile ("inb %w1,%0" : "=a" (data) : "d" (port)); + asm volatile ("inb %0, %w1" : "=a" (data) : "d" (port)); return data; } @@ -18,7 +59,8 @@ inb (uint16_t port) static inline void insb (uint16_t port, void *addr, size_t cnt) { - asm volatile ("cld; repne; insb" + /* See [IA32-v2a] "INS". */ + asm volatile ("cld; repne insb" : "=D" (addr), "=c" (cnt) : "d" (port), "0" (addr), "1" (cnt) : "memory", "cc"); @@ -29,7 +71,8 @@ static inline uint16_t inw (uint16_t port) { uint16_t data; - asm volatile ("inw %w1,%0" : "=a" (data) : "d" (port)); + /* See [IA32-v2a] "IN". */ + asm volatile ("inw %0, %w1" : "=a" (data) : "d" (port)); return data; } @@ -38,7 +81,8 @@ inw (uint16_t port) static inline void insw (uint16_t port, void *addr, size_t cnt) { - asm volatile ("cld; repne; insw" + /* See [IA32-v2a] "INS". */ + asm volatile ("cld; repne insw" : "=D" (addr), "=c" (cnt) : "d" (port), "0" (addr), "1" (cnt) : "memory", "cc"); @@ -48,8 +92,9 @@ insw (uint16_t port, void *addr, size_t cnt) static inline uint32_t inl (uint16_t port) { + /* See [IA32-v2a] "IN". */ uint32_t data; - asm volatile ("inl %w1,%0" : "=a" (data) : "d" (port)); + asm volatile ("ind %0, %w1" : "=a" (data) : "d" (port)); return data; } @@ -58,7 +103,8 @@ inl (uint16_t port) static inline void insl (uint16_t port, void *addr, size_t cnt) { - asm volatile ("cld; repne; insl" + /* See [IA32-v2a] "INS". */ + asm volatile ("cld; repne insd" : "=D" (addr), "=c" (cnt) : "d" (port), "0" (addr), "1" (cnt) : "memory", "cc"); @@ -68,7 +114,8 @@ insl (uint16_t port, void *addr, size_t cnt) static inline void outb (uint16_t port, uint8_t data) { - asm volatile ("outb %0,%w1" : : "a" (data), "d" (port)); + /* See [IA32-v2b] "OUT". */ + asm volatile ("outb %w1, %0" : : "a" (data), "d" (port)); } /* Writes to PORT each byte of data in the CNT-byte buffer @@ -76,7 +123,8 @@ outb (uint16_t port, uint8_t data) static inline void outsb (uint16_t port, const void *addr, size_t cnt) { - asm volatile ("cld; repne; outsb" + /* See [IA32-v2b] "OUTS". */ + asm volatile ("cld; repne outsb" : "=S" (addr), "=c" (cnt) : "d" (port), "0" (addr), "1" (cnt) : "cc"); @@ -86,7 +134,8 @@ outsb (uint16_t port, const void *addr, size_t cnt) static inline void outw (uint16_t port, uint16_t data) { - asm volatile ("outw %0,%w1" : : "a" (data), "d" (port)); + /* See [IA32-v2b] "OUT". */ + asm volatile ("outw %w1, %0" : : "a" (data), "d" (port)); } /* Writes to PORT each 16-bit unit (halfword) of data in the @@ -94,7 +143,8 @@ outw (uint16_t port, uint16_t data) static inline void outsw (uint16_t port, const void *addr, size_t cnt) { - asm volatile ("cld; repne; outsw" + /* See [IA32-v2b] "OUTS". */ + asm volatile ("cld; repne outsw" : "=S" (addr), "=c" (cnt) : "d" (port), "0" (addr), "1" (cnt) : "cc"); @@ -104,7 +154,8 @@ outsw (uint16_t port, const void *addr, size_t cnt) static inline void outl (uint16_t port, uint32_t data) { - asm volatile ("outl %0,%w1" : : "a" (data), "d" (port)); + /* See [IA32-v2b] "OUT". */ + asm volatile ("outd %w1, %0" : : "a" (data), "d" (port)); } /* Writes to PORT each 32-bit unit (word) of data in the CNT-word @@ -112,10 +163,11 @@ outl (uint16_t port, uint32_t data) static inline void outsl (uint16_t port, const void *addr, size_t cnt) { - asm volatile ("cld; repne; outsl" + /* See [IA32-v2b] "OUTS". */ + asm volatile ("cld; repne outsd" : "=S" (addr), "=c" (cnt) : "d" (port), "0" (addr), "1" (cnt) : "cc"); } -#endif /* io.h */ +#endif /* threads/io.h */