X-Git-Url: https://pintos-os.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fopenflow%2Fnicira-ext.h;h=3970e23fecea2e01ba8fe76bfb792c84aee57c5d;hb=d689a6a819c5bd4f4bde2c8766c0c7652b70eb3e;hp=a08ae14af2f46574655e7881d04d41abf2c0103f;hpb=09246b99d1601e2ba7ff85bb26f9b0235632a76d;p=openvswitch diff --git a/include/openflow/nicira-ext.h b/include/openflow/nicira-ext.h index a08ae14a..3970e23f 100644 --- a/include/openflow/nicira-ext.h +++ b/include/openflow/nicira-ext.h @@ -205,8 +205,8 @@ OFP_ASSERT(sizeof(struct nxt_tun_id_cookie) == 24); * OpenFlow features. In particular attempts to modify the flow table * will be rejected with an OFPBRC_EPERM error. * - * Slave controllers also do not receive asynchronous messages - * (OFPT_PACKET_IN, OFPT_FLOW_REMOVED, OFPT_PORT_STATUS). + * Slave controllers do not receive OFPT_PACKET_IN or OFPT_FLOW_REMOVED + * messages, but they do receive OFPT_PORT_STATUS messages. */ struct nx_role_request { struct nicira_header nxh; @@ -227,7 +227,10 @@ enum nx_action_subtype { NXAST_SET_TUNNEL, /* struct nx_action_set_tunnel */ NXAST_DROP_SPOOFED_ARP, /* struct nx_action_drop_spoofed_arp */ NXAST_SET_QUEUE, /* struct nx_action_set_queue */ - NXAST_POP_QUEUE /* struct nx_action_pop_queue */ + NXAST_POP_QUEUE, /* struct nx_action_pop_queue */ + NXAST_REG_MOVE, /* struct nx_action_reg_move */ + NXAST_REG_LOAD, /* struct nx_action_reg_load */ + NXAST_NOTE /* struct nx_action_note */ }; /* Header for Nicira-defined actions. */ @@ -337,6 +340,130 @@ struct nx_action_pop_queue { }; OFP_ASSERT(sizeof(struct nx_action_pop_queue) == 16); +/* Action structure for NXAST_REG_MOVE. + * + * Copies src[src_ofs:src_ofs+n_bits] to dst[dst_ofs:dst_ofs+n_bits], where + * a[b:c] denotes the bits within 'a' numbered 'b' through 'c' (not including + * bit 'c'). Bit numbering starts at 0 for the least-significant bit, 1 for + * the next most significant bit, and so on. + * + * 'src' and 'dst' are nxm_header values with nxm_hasmask=0. (It doesn't make + * sense to use nxm_hasmask=1 because the action does not do any kind of + * matching; it uses the actual value of a field.) + * + * The following nxm_header values are potentially acceptable as 'src': + * + * - NXM_OF_IN_PORT + * - NXM_OF_ETH_DST + * - NXM_OF_ETH_SRC + * - NXM_OF_ETH_TYPE + * - NXM_OF_VLAN_TCI + * - NXM_OF_IP_TOS + * - NXM_OF_IP_PROTO + * - NXM_OF_IP_SRC + * - NXM_OF_IP_DST + * - NXM_OF_TCP_SRC + * - NXM_OF_TCP_DST + * - NXM_OF_UDP_SRC + * - NXM_OF_UDP_DST + * - NXM_OF_ICMP_TYPE + * - NXM_OF_ICMP_CODE + * - NXM_OF_ARP_OP + * - NXM_OF_ARP_SPA + * - NXM_OF_ARP_TPA + * - NXM_NX_TUN_ID + * - NXM_NX_REG(idx) for idx in the switch's accepted range. + * + * The following nxm_header values are potentially acceptable as 'dst': + * + * - NXM_NX_REG(idx) for idx in the switch's accepted range. + * + * - NXM_OF_VLAN_TCI. Modifying this field's value has side effects on the + * packet's 802.1Q header. Setting a value with CFI=0 removes the 802.1Q + * header (if any), ignoring the other bits. Setting a value with CFI=1 + * adds or modifies the 802.1Q header appropriately, setting the TCI field + * to the field's new value (with the CFI bit masked out). + * + * - NXM_NX_TUN_ID. Modifying this value modifies the tunnel ID used for the + * packet's next tunnel encapsulation. + * + * A given nxm_header value may be used as 'src' or 'dst' only on a flow whose + * nx_match satisfies its prerequisites. For example, NXM_OF_IP_TOS may be + * used only if the flow's nx_match includes an nxm_entry that specifies + * nxm_type=NXM_OF_ETH_TYPE, nxm_hasmask=0, and nxm_value=0x0800. + * + * The switch will reject actions for which src_ofs+n_bits is greater than the + * width of 'src' or dst_ofs+n_bits is greater than the width of 'dst' with + * error type OFPET_BAD_ACTION, code OFPBAC_BAD_ARGUMENT. + */ +struct nx_action_reg_move { + ovs_be16 type; /* OFPAT_VENDOR. */ + ovs_be16 len; /* Length is 16. */ + ovs_be32 vendor; /* NX_VENDOR_ID. */ + ovs_be16 subtype; /* NXAST_REG_MOVE. */ + ovs_be16 n_bits; /* Number of bits. */ + ovs_be16 src_ofs; /* Starting bit offset in source. */ + ovs_be16 dst_ofs; /* Starting bit offset in destination. */ + ovs_be32 src; /* Source register. */ + ovs_be32 dst; /* Destination register. */ +}; +OFP_ASSERT(sizeof(struct nx_action_reg_move) == 24); + +/* Action structure for NXAST_REG_LOAD. + * + * Copies value[0:n_bits] to dst[ofs:ofs+n_bits], where a[b:c] denotes the bits + * within 'a' numbered 'b' through 'c' (not including bit 'c'). Bit numbering + * starts at 0 for the least-significant bit, 1 for the next most significant + * bit, and so on. + * + * 'dst' is an nxm_header with nxm_hasmask=0. It must be one of the following: + * + * - NXM_NX_REG(idx) for idx in the switch's accepted range. + * + * The 'ofs' and 'n_bits' fields are combined into a single 'ofs_nbits' field + * to avoid enlarging the structure by another 8 bytes. To allow 'n_bits' to + * take a value between 1 and 64 (inclusive) while taking up only 6 bits, it is + * also stored as one less than its true value: + * + * 15 6 5 0 + * +------------------------------+------------------+ + * | ofs | n_bits - 1 | + * +------------------------------+------------------+ + * + * The switch will reject actions for which ofs+n_bits is greater than the + * width of 'dst', or in which any bits in 'value' with value 2**n_bits or + * greater are set to 1, with error type OFPET_BAD_ACTION, code + * OFPBAC_BAD_ARGUMENT. + */ +struct nx_action_reg_load { + ovs_be16 type; /* OFPAT_VENDOR. */ + ovs_be16 len; /* Length is 16. */ + ovs_be32 vendor; /* NX_VENDOR_ID. */ + ovs_be16 subtype; /* NXAST_REG_LOAD. */ + ovs_be16 ofs_nbits; /* (ofs << 6) | (n_bits - 1). */ + ovs_be32 dst; /* Destination register. */ + ovs_be64 value; /* Immediate value. */ +}; +OFP_ASSERT(sizeof(struct nx_action_reg_load) == 24); + +/* Action structure for NXAST_NOTE. + * + * This action has no effect. It is variable length. The switch does not + * attempt to interpret the user-defined 'note' data in any way. A controller + * can use this action to attach arbitrary metadata to a flow. + * + * This action might go away in the future. + */ +struct nx_action_note { + uint16_t type; /* OFPAT_VENDOR. */ + uint16_t len; /* A multiple of 8, but at least 16. */ + uint32_t vendor; /* NX_VENDOR_ID. */ + uint16_t subtype; /* NXAST_NOTE. */ + uint8_t note[6]; /* Start of user-defined data. */ + /* Possibly followed by additional user-defined data. */ +}; +OFP_ASSERT(sizeof(struct nx_action_note) == 16); + /* Wildcard for tunnel ID. */ #define NXFW_TUN_ID (1 << 25) @@ -564,8 +691,12 @@ OFP_ASSERT(sizeof(struct nx_action_pop_queue) == 16); * * Format: 48-bit Ethernet MAC address. * - * Masking: Not maskable. */ + * Masking: The nxm_mask patterns 01:00:00:00:00:00 and FE:FF:FF:FF:FF:FF must + * be supported for NXM_OF_ETH_DST_W (as well as the trivial patterns that + * are all-0-bits or all-1-bits). Support for other patterns and for masking + * of NXM_OF_ETH_SRC is optional. */ #define NXM_OF_ETH_DST NXM_HEADER (0x0000, 1, 6) +#define NXM_OF_ETH_DST_W NXM_HEADER_W(0x0000, 1, 6) #define NXM_OF_ETH_SRC NXM_HEADER (0x0000, 2, 6) /* Packet's Ethernet type. @@ -721,6 +852,32 @@ OFP_ASSERT(sizeof(struct nx_action_pop_queue) == 16); /* ## Nicira match extensions. ## */ /* ## ------------------------ ## */ +/* Metadata registers. + * + * Registers initially have value 0. Actions allow register values to be + * manipulated. + * + * Prereqs: None. + * + * Format: Array of 32-bit integer registers. Space is reserved for up to + * NXM_NX_MAX_REGS registers, but switches may implement fewer. + * + * Masking: Arbitrary masks. */ +#define NXM_NX_MAX_REGS 16 +#define NXM_NX_REG(IDX) NXM_HEADER (0x0001, IDX, 4) +#define NXM_NX_REG_W(IDX) NXM_HEADER_W(0x0001, IDX, 4) +#define NXM_NX_REG_IDX(HEADER) NXM_FIELD(HEADER) +#define NXM_IS_NX_REG(HEADER) (!((((HEADER) ^ NXM_NX_REG0)) & 0xffffe1ff)) +#define NXM_IS_NX_REG_W(HEADER) (!((((HEADER) ^ NXM_NX_REG0_W)) & 0xffffe1ff)) +#define NXM_NX_REG0 NXM_HEADER (0x0001, 0, 4) +#define NXM_NX_REG0_W NXM_HEADER_W(0x0001, 0, 4) +#define NXM_NX_REG1 NXM_HEADER (0x0001, 1, 4) +#define NXM_NX_REG1_W NXM_HEADER_W(0x0001, 1, 4) +#define NXM_NX_REG2 NXM_HEADER (0x0001, 2, 4) +#define NXM_NX_REG2_W NXM_HEADER_W(0x0001, 2, 4) +#define NXM_NX_REG3 NXM_HEADER (0x0001, 3, 4) +#define NXM_NX_REG3_W NXM_HEADER_W(0x0001, 3, 4) + /* Tunnel ID. * * For a packet received via GRE tunnel including a (32-bit) key, the key is @@ -739,7 +896,7 @@ OFP_ASSERT(sizeof(struct nx_action_pop_queue) == 16); /* ## Requests and replies. ## */ /* ## --------------------- ## */ -enum { +enum nx_flow_format { NXFF_OPENFLOW10 = 0, /* Standard OpenFlow 1.0 compatible. */ NXFF_TUN_ID_FROM_COOKIE = 1, /* OpenFlow 1.0, plus obtain tunnel ID from * cookie. */