#include "threads/mmu.h"
#include "threads/palloc.h"
+static uint32_t *active_pd (void);
+
/* Creates a new page directory that has mappings for kernel
virtual addresses, but none for user virtual addresses.
Returns the new page directory, or a null pointer if memory
uint32_t *
pagedir_create (void)
{
- uint32_t *pd = palloc_get (0);
+ uint32_t *pd = palloc_get_page (0);
memcpy (pd, base_page_dir, PGSIZE);
return pd;
}
for (pte = pt; pte < pt + PGSIZE / sizeof *pte; pte++)
if (*pte & PG_P)
- palloc_free (pte_get_page (*pte));
- palloc_free (pt);
+ palloc_free_page (pte_get_page (*pte));
+ palloc_free_page (pt);
}
- palloc_free (pd);
+ palloc_free_page (pd);
}
-/* Returns the mapping of user virtual address UADDR in page
- directory PD into a kernel virtual address.
- If UADDR is unmapped, behavior varies based on CREATE:
- if CREATE is true, then a new, zeroed page is created and a
+/* Returns the address of the page table entry for user virtual
+ address UADDR in page directory PD.
+ If PD does not have a page table for UADDR, behavior varies
+ based on CREATE:
+ if CREATE is true, then a new page table is created and a
pointer into it is returned,
otherwise a null pointer is returned.
Also returns a null pointer if UADDR is a kernel address. */
{
if (create)
{
- pt = palloc_get (PAL_ZERO);
+ pt = palloc_get_page (PAL_ZERO);
if (pt == NULL)
return NULL;
pagedir_get_page (uint32_t *pd, const void *uaddr)
{
uint32_t *pte = lookup_page (pd, (void *) uaddr, false);
- return pte != NULL && *pte != 0 ? pte_get_page (*pte) : NULL;
+ return (pte != NULL && *pte != 0
+ ? (uint8_t *) pte_get_page (*pte) + pg_ofs (uaddr)
+ : NULL);
+}
+
+/* Clears any mapping for user virtual address UPAGE in page
+ directory PD.
+ UPAGE need not already be mapped. */
+void
+pagedir_clear_page (uint32_t *pd, void *upage)
+{
+ uint32_t *pte = lookup_page (pd, upage, false);
+ if (pte != NULL && *pte != 0)
+ {
+ *pte = 0;
+
+ if (active_pd () == pd)
+ {
+ /* We cleared a page-table entry in the active page
+ table, so we have to invalidate the TLB. See
+ [IA32-v3], section 3.11. */
+ pagedir_activate (pd);
+ }
+ }
+
+}
+
+/* Returns true if the PTE for user virtual page UPAGE in PD is
+ dirty, that is, if the page has been modified since the PTE
+ was installed.
+ Returns false if PD contains no PDE for UPAGE. */
+bool
+pagedir_test_dirty (uint32_t *pd, const void *upage)
+{
+ uint32_t *pte = lookup_page (pd, (void *) upage, false);
+ return pte != NULL && (*pte & PG_D) != 0;
+}
+
+/* Returns true if the PTE for user virtual page UPAGE in PD has
+ been accessed recently, that is, between the time the PTE was
+ installed and the last time it was cleared.
+ Returns false if PD contains no PDE for UPAGE. */
+bool
+pagedir_test_accessed (uint32_t *pd, const void *upage)
+{
+ uint32_t *pte = lookup_page (pd, (void *) upage, false);
+ return pte != NULL && (*pte & PG_A) != 0;
+}
+
+/* Resets the accessed bit in the PTE for user virtual page UPAGE
+ in PD. */
+void
+pagedir_clear_accessed (uint32_t *pd, const void *upage)
+{
+ uint32_t *pte = lookup_page (pd, (void *) upage, false);
+ if (pte != NULL)
+ *pte &= ~(uint32_t) PG_A;
}
/* Loads page directory PD into the CPU's page directory base
{
if (pd == NULL)
pd = base_page_dir;
- asm volatile ("movl %0,%%cr3" :: "r" (vtop (pd)));
+
+ /* Store the physical address of the page directory into CR3
+ aka PDBR (page directory base register). This activates our
+ new page tables immediately. See [IA32-v2a] "MOV--Move
+ to/from Control Registers" and [IA32-v3] 3.7.5. */
+ asm volatile ("mov %%cr3, %0" :: "r" (vtop (pd)));
+}
+
+/* Returns the currently active page directory. */
+static uint32_t *
+active_pd (void)
+{
+ /* Copy CR3, the page directory base register (PDBR), into
+ `pd'.
+ See [IA32-v2a] "MOV--Move to/from Control Registers" and
+ [IA32-v3] 3.7.5. */
+ uint32_t *pd;
+ asm ("mov %0, %%cr3" : "=r" (pd));
+ return pd;
}