csum: Avoid misaligned data access.

[openvswitch] / lib / nx-match.def

diff --git a/lib/nx-match.def b/lib/nx-match.def
index ec5fe9b3118b7c75701d8db05c293fd3e13e8a38..f6167af43cd9f643d3d2002e60280fe354b28bdf 100644 (file)
--- a/lib/nx-match.def
+++ b/lib/nx-match.def
@@ -21,7 +21,7 @@
 /*             NXM_ bit      OFPFW_* bit     dl_type       nw_proto      */
 /*             ------------  --------------  -----------   ------------- */
 DEFINE_FIELD  (OF_IN_PORT,   OFPFW_IN_PORT,  0,            0)
-DEFINE_FIELD  (OF_ETH_DST,   OFPFW_DL_DST,   0,            0)
+DEFINE_FIELD_M(OF_ETH_DST,   0,              0,            0)
 DEFINE_FIELD  (OF_ETH_SRC,   OFPFW_DL_SRC,   0,            0)
 DEFINE_FIELD  (OF_ETH_TYPE,  OFPFW_DL_TYPE,  0,            0)
 DEFINE_FIELD_M(OF_VLAN_TCI,  0,              0,            0)
@@ -40,4 +40,18 @@ DEFINE_FIELD_M(OF_ARP_SPA,   0,              ETH_TYPE_ARP, 0)
 DEFINE_FIELD_M(OF_ARP_TPA,   0,              ETH_TYPE_ARP, 0)
 DEFINE_FIELD  (NX_TUN_ID,    NXFW_TUN_ID,    0,            0)
 
+DEFINE_FIELD_M(NX_REG0,      0,              0,            0)
+#if FLOW_N_REGS >= 2
+DEFINE_FIELD_M(NX_REG1,      0,              0,            0)
+#endif
+#if FLOW_N_REGS >= 3
+DEFINE_FIELD_M(NX_REG2,      0,              0,            0)
+#endif
+#if FLOW_N_REGS >= 4
+DEFINE_FIELD_M(NX_REG3,      0,              0,            0)
+#endif
+#if FLOW_N_REGS > 4
+#error
+#endif
+
 #undef DEFINE_FIELD