* bit 'c'). Bit numbering starts at 0 for the least-significant bit, 1 for
* the next most significant bit, and so on.
*
- * 'src' and 'dst' are nxm_header values with nxm_hasmask=0. The following
- * nxm_header values are potentially acceptable as 'src':
+ * 'src' and 'dst' are nxm_header values with nxm_hasmask=0. (It doesn't make
+ * sense to use nxm_hasmask=1 because the action does not do any kind of
+ * matching; it uses the actual value of a field.)
+ *
+ * The following nxm_header values are potentially acceptable as 'src':
*
* - NXM_OF_IN_PORT
* - NXM_OF_ETH_DST
* starts at 0 for the least-significant bit, 1 for the next most significant
* bit, and so on.
*
- * 'dst' must be one of the following:
+ * 'dst' is an nxm_header with nxm_hasmask=0. It must be one of the following:
*
* - NXM_NX_REG(idx) for idx in the switch's accepted range.
*
#define NXM_NX_REG(IDX) NXM_HEADER (0x0001, IDX, 4)
#define NXM_NX_REG_W(IDX) NXM_HEADER_W(0x0001, IDX, 4)
#define NXM_NX_REG_IDX(HEADER) NXM_FIELD(HEADER)
-#define NXM_IS_NX_REG(HEADER) (!((((HEADER) ^ NXM_NX_REG(0))) & 0xffffe0ff))
+#define NXM_IS_NX_REG(HEADER) (!((((HEADER) ^ NXM_NX_REG0)) & 0xffffe1ff))
+#define NXM_IS_NX_REG_W(HEADER) (!((((HEADER) ^ NXM_NX_REG0_W)) & 0xffffe1ff))
#define NXM_NX_REG0 NXM_HEADER (0x0001, 0, 4)
#define NXM_NX_REG0_W NXM_HEADER_W(0x0001, 0, 4)
#define NXM_NX_REG1 NXM_HEADER (0x0001, 1, 4)