- uint32_t e0 = ((limit & 0xffff) /* Limit 15:0. */
- | (base << 16)); /* Base 15:0. */
- uint32_t e1 = (((base >> 16) & 0xff) /* Base 23:16. */
- | (system << 12) /* 0=system, 1=code/data. */
- | (type << 8) /* Segment type. */
- | (dpl << 13) /* Descriptor privilege. */
- | (1 << 15) /* Present. */
- | (limit & 0xf0000) /* Limit 16:19. */
- | (1 << 22) /* 32-bit segment. */
- | (granularity << 23) /* Byte/page granularity. */
- | (base & 0xff000000)); /* Base 31:24. */
- return e0 | ((uint64_t) e1 << 32);
+ uint32_t *pd, *pt;
+ size_t page;
+ extern char _start, _end_kernel_text;
+
+ pd = base_page_dir = palloc_get_page (PAL_ASSERT | PAL_ZERO);
+ pt = NULL;
+ for (page = 0; page < ram_pages; page++)
+ {
+ uintptr_t paddr = page * PGSIZE;
+ char *vaddr = ptov (paddr);
+ size_t pde_idx = pd_no (vaddr);
+ size_t pte_idx = pt_no (vaddr);
+ bool in_kernel_text = &_start <= vaddr && vaddr < &_end_kernel_text;
+
+ if (pd[pde_idx] == 0)
+ {
+ pt = palloc_get_page (PAL_ASSERT | PAL_ZERO);
+ pd[pde_idx] = pde_create (pt);
+ }
+
+ pt[pte_idx] = pte_create_kernel (vaddr, !in_kernel_text);
+ }
+
+ /* Store the physical address of the page directory into CR3
+ aka PDBR (page directory base register). This activates our
+ new page tables immediately. See [IA32-v2a] "MOV--Move
+ to/from Control Registers" and [IA32-v3a] 3.7.5 "Base Address
+ of the Page Directory". */
+ asm volatile ("movl %0, %%cr3" : : "r" (vtop (base_page_dir)));