- * 'wildcards' is in host byte order. The return value is in network byte
- * order. */
-static inline uint32_t
-flow_nw_bits_to_mask(uint32_t wildcards, int shift)
-{
- wildcards = (wildcards >> shift) & 0x3f;
- return wildcards < 32 ? htonl(~((1u << wildcards) - 1)) : 0;
-}
+ * The flow_wildcards_*() functions below both depend on and maintain the
+ * following important invariants:
+ *
+ * 1. 'wildcards' is nonzero if and only if at least one bit or field is
+ * wildcarded.
+ *
+ * 2. Bits in 'wildcards' not included in OVSFW_ALL or FWW_ALL are set to 0.
+ * (This is a corollary to invariant #1.)
+ *
+ * 3. The fields in 'wildcards' masked by OFPFW_NW_SRC_MASK and
+ * OFPFW_NW_DST_MASK have values between 0 and 32, inclusive.
+ *
+ * 4. The fields masked by OFPFW_NW_SRC_MASK and OFPFW_NW_DST_MASK correspond
+ * correctly to the masks in 'nw_src_mask' and 'nw_dst_mask', respectively.
+ *
+ * 5. FWW_REGS is set to 1 in 'wildcards' if and only if at least one bit in
+ * 'reg_masks[]' is nonzero. (This allows wildcarded 'reg_masks[]' to
+ * satisfy invariant #1.)
+ *
+ * 6. If FWW_REGS is set to 0 in 'wildcards', then the values of all of the
+ * other members can be correctly predicted based on 'wildcards' alone.
+ */
+struct flow_wildcards {
+ uint32_t wildcards; /* OFPFW_* | OVSFW_* | FWW_*. */
+ uint32_t reg_masks[FLOW_N_REGS]; /* 1-bit in each significant regs bit. */
+ ovs_be32 nw_src_mask; /* 1-bit in each significant nw_src bit. */
+ ovs_be32 nw_dst_mask; /* 1-bit in each significant nw_dst bit. */
+};