+OFP_ASSERT(sizeof(struct nx_action_set_tunnel64) == 24);
+
+/* Action structure for NXAST_SET_QUEUE.
+ *
+ * Set the queue that should be used when packets are output. This is similar
+ * to the OpenFlow OFPAT_ENQUEUE action, but does not take the output port as
+ * an argument. This allows the queue to be defined before the port is
+ * known. */
+struct nx_action_set_queue {
+ ovs_be16 type; /* OFPAT_VENDOR. */
+ ovs_be16 len; /* Length is 16. */
+ ovs_be32 vendor; /* NX_VENDOR_ID. */
+ ovs_be16 subtype; /* NXAST_SET_QUEUE. */
+ uint8_t pad[2];
+ ovs_be32 queue_id; /* Where to enqueue packets. */
+};
+OFP_ASSERT(sizeof(struct nx_action_set_queue) == 16);
+
+/* Action structure for NXAST_POP_QUEUE.
+ *
+ * Restores the queue to the value it was before any NXAST_SET_QUEUE actions
+ * were used. Only the original queue can be restored this way; no stack is
+ * maintained. */
+struct nx_action_pop_queue {
+ ovs_be16 type; /* OFPAT_VENDOR. */
+ ovs_be16 len; /* Length is 16. */
+ ovs_be32 vendor; /* NX_VENDOR_ID. */
+ ovs_be16 subtype; /* NXAST_POP_QUEUE. */
+ uint8_t pad[6];
+};
+OFP_ASSERT(sizeof(struct nx_action_pop_queue) == 16);
+
+/* Action structure for NXAST_REG_MOVE.
+ *
+ * Copies src[src_ofs:src_ofs+n_bits] to dst[dst_ofs:dst_ofs+n_bits], where
+ * a[b:c] denotes the bits within 'a' numbered 'b' through 'c' (not including
+ * bit 'c'). Bit numbering starts at 0 for the least-significant bit, 1 for
+ * the next most significant bit, and so on.
+ *
+ * 'src' and 'dst' are nxm_header values with nxm_hasmask=0. (It doesn't make
+ * sense to use nxm_hasmask=1 because the action does not do any kind of
+ * matching; it uses the actual value of a field.)
+ *
+ * The following nxm_header values are potentially acceptable as 'src':
+ *
+ * - NXM_OF_IN_PORT
+ * - NXM_OF_ETH_DST
+ * - NXM_OF_ETH_SRC
+ * - NXM_OF_ETH_TYPE
+ * - NXM_OF_VLAN_TCI
+ * - NXM_OF_IP_TOS
+ * - NXM_OF_IP_PROTO
+ * - NXM_OF_IP_SRC
+ * - NXM_OF_IP_DST
+ * - NXM_OF_TCP_SRC
+ * - NXM_OF_TCP_DST
+ * - NXM_OF_UDP_SRC
+ * - NXM_OF_UDP_DST
+ * - NXM_OF_ICMP_TYPE
+ * - NXM_OF_ICMP_CODE
+ * - NXM_OF_ARP_OP
+ * - NXM_OF_ARP_SPA
+ * - NXM_OF_ARP_TPA
+ * - NXM_NX_TUN_ID
+ * - NXM_NX_ARP_SHA
+ * - NXM_NX_ARP_THA
+ * - NXM_NX_ICMPV6_TYPE
+ * - NXM_NX_ICMPV6_CODE
+ * - NXM_NX_ND_SLL
+ * - NXM_NX_ND_TLL
+ * - NXM_NX_REG(idx) for idx in the switch's accepted range.
+ *
+ * The following nxm_header values are potentially acceptable as 'dst':
+ *
+ * - NXM_NX_REG(idx) for idx in the switch's accepted range.
+ *
+ * - NXM_OF_VLAN_TCI. Modifying this field's value has side effects on the
+ * packet's 802.1Q header. Setting a value with CFI=0 removes the 802.1Q
+ * header (if any), ignoring the other bits. Setting a value with CFI=1
+ * adds or modifies the 802.1Q header appropriately, setting the TCI field
+ * to the field's new value (with the CFI bit masked out).
+ *
+ * - NXM_NX_TUN_ID. Modifying this value modifies the tunnel ID used for the
+ * packet's next tunnel encapsulation.
+ *
+ * A given nxm_header value may be used as 'src' or 'dst' only on a flow whose
+ * nx_match satisfies its prerequisites. For example, NXM_OF_IP_TOS may be
+ * used only if the flow's nx_match includes an nxm_entry that specifies
+ * nxm_type=NXM_OF_ETH_TYPE, nxm_hasmask=0, and nxm_value=0x0800.
+ *
+ * The switch will reject actions for which src_ofs+n_bits is greater than the
+ * width of 'src' or dst_ofs+n_bits is greater than the width of 'dst' with
+ * error type OFPET_BAD_ACTION, code OFPBAC_BAD_ARGUMENT.
+ */
+struct nx_action_reg_move {
+ ovs_be16 type; /* OFPAT_VENDOR. */
+ ovs_be16 len; /* Length is 16. */
+ ovs_be32 vendor; /* NX_VENDOR_ID. */
+ ovs_be16 subtype; /* NXAST_REG_MOVE. */
+ ovs_be16 n_bits; /* Number of bits. */
+ ovs_be16 src_ofs; /* Starting bit offset in source. */
+ ovs_be16 dst_ofs; /* Starting bit offset in destination. */
+ ovs_be32 src; /* Source register. */
+ ovs_be32 dst; /* Destination register. */
+};
+OFP_ASSERT(sizeof(struct nx_action_reg_move) == 24);
+
+/* Action structure for NXAST_REG_LOAD.
+ *
+ * Copies value[0:n_bits] to dst[ofs:ofs+n_bits], where a[b:c] denotes the bits
+ * within 'a' numbered 'b' through 'c' (not including bit 'c'). Bit numbering
+ * starts at 0 for the least-significant bit, 1 for the next most significant
+ * bit, and so on.
+ *
+ * 'dst' is an nxm_header with nxm_hasmask=0. See the documentation for
+ * NXAST_REG_MOVE, above, for the permitted fields and for the side effects of
+ * loading them.
+ *
+ * The 'ofs' and 'n_bits' fields are combined into a single 'ofs_nbits' field
+ * to avoid enlarging the structure by another 8 bytes. To allow 'n_bits' to
+ * take a value between 1 and 64 (inclusive) while taking up only 6 bits, it is
+ * also stored as one less than its true value:
+ *
+ * 15 6 5 0
+ * +------------------------------+------------------+
+ * | ofs | n_bits - 1 |
+ * +------------------------------+------------------+
+ *
+ * The switch will reject actions for which ofs+n_bits is greater than the
+ * width of 'dst', or in which any bits in 'value' with value 2**n_bits or
+ * greater are set to 1, with error type OFPET_BAD_ACTION, code
+ * OFPBAC_BAD_ARGUMENT.
+ */
+struct nx_action_reg_load {
+ ovs_be16 type; /* OFPAT_VENDOR. */
+ ovs_be16 len; /* Length is 16. */
+ ovs_be32 vendor; /* NX_VENDOR_ID. */
+ ovs_be16 subtype; /* NXAST_REG_LOAD. */
+ ovs_be16 ofs_nbits; /* (ofs << 6) | (n_bits - 1). */
+ ovs_be32 dst; /* Destination register. */
+ ovs_be64 value; /* Immediate value. */
+};
+OFP_ASSERT(sizeof(struct nx_action_reg_load) == 24);
+
+/* Action structure for NXAST_NOTE.
+ *
+ * This action has no effect. It is variable length. The switch does not
+ * attempt to interpret the user-defined 'note' data in any way. A controller
+ * can use this action to attach arbitrary metadata to a flow.
+ *
+ * This action might go away in the future.
+ */
+struct nx_action_note {
+ ovs_be16 type; /* OFPAT_VENDOR. */
+ ovs_be16 len; /* A multiple of 8, but at least 16. */
+ ovs_be32 vendor; /* NX_VENDOR_ID. */
+ ovs_be16 subtype; /* NXAST_NOTE. */
+ uint8_t note[6]; /* Start of user-defined data. */
+ /* Possibly followed by additional user-defined data. */
+};
+OFP_ASSERT(sizeof(struct nx_action_note) == 16);
+
+/* Action structure for NXAST_MULTIPATH.
+ *
+ * This action performs the following steps in sequence:
+ *
+ * 1. Hashes the fields designated by 'fields', one of NX_MP_FIELDS_*.
+ * Refer to the definition of "enum nx_mp_fields" for details.
+ *
+ * The 'basis' value is used as a universal hash parameter, that is,
+ * different values of 'basis' yield different hash functions. The
+ * particular universal hash function used is implementation-defined.
+ *
+ * The hashed fields' values are drawn from the current state of the
+ * flow, including all modifications that have been made by actions up to
+ * this point.
+ *
+ * 2. Applies the multipath link choice algorithm specified by 'algorithm',
+ * one of NX_MP_ALG_*. Refer to the definition of "enum nx_mp_algorithm"
+ * for details.
+ *
+ * The output of the algorithm is 'link', an unsigned integer less than
+ * or equal to 'max_link'.
+ *
+ * Some algorithms use 'arg' as an additional argument.
+ *
+ * 3. Stores 'link' in dst[ofs:ofs+n_bits]. The format and semantics of
+ * 'dst' and 'ofs_nbits' are similar to those for the NXAST_REG_LOAD
+ * action, except that 'dst' must be NXM_NX_REG(idx) for 'idx' in the
+ * switch's supported range.
+ *
+ * The switch will reject actions that have an unknown 'fields', or an unknown
+ * 'algorithm', or in which ofs+n_bits is greater than the width of 'dst', or
+ * in which 'max_link' is greater than or equal to 2**n_bits, with error type
+ * OFPET_BAD_ACTION, code OFPBAC_BAD_ARGUMENT.
+ */
+struct nx_action_multipath {
+ ovs_be16 type; /* OFPAT_VENDOR. */
+ ovs_be16 len; /* Length is 32. */
+ ovs_be32 vendor; /* NX_VENDOR_ID. */
+ ovs_be16 subtype; /* NXAST_MULTIPATH. */
+
+ /* What fields to hash and how. */
+ ovs_be16 fields; /* One of NX_MP_FIELDS_*. */
+ ovs_be16 basis; /* Universal hash parameter. */
+ ovs_be16 pad0;
+
+ /* Multipath link choice algorithm to apply to hash value. */
+ ovs_be16 algorithm; /* One of NX_MP_ALG_*. */
+ ovs_be16 max_link; /* Number of output links, minus 1. */
+ ovs_be32 arg; /* Algorithm-specific argument. */
+ ovs_be16 pad1;
+
+ /* Where to store the result. */
+ ovs_be16 ofs_nbits; /* (ofs << 6) | (n_bits - 1). */
+ ovs_be32 dst; /* Destination register. */
+};
+OFP_ASSERT(sizeof(struct nx_action_multipath) == 32);
+
+/* NXAST_MULTIPATH: Fields to hash. */
+enum nx_mp_fields {
+ /* Ethernet source address (NXM_OF_ETH_SRC) only. */
+ NX_MP_FIELDS_ETH_SRC,
+
+ /* L2 through L4, symmetric across src/dst. Specifically, each of the
+ * following fields, if present, is hashed (slashes separate symmetric
+ * pairs):
+ *
+ * - NXM_OF_ETH_DST / NXM_OF_ETH_SRC
+ * - NXM_OF_ETH_TYPE
+ * - The VID bits from NXM_OF_VLAN_TCI, ignoring PCP and CFI.
+ * - NXM_OF_IP_PROTO
+ * - NXM_OF_IP_SRC / NXM_OF_IP_DST
+ * - NXM_OF_TCP_SRC / NXM_OF_TCP_DST
+ * - NXM_OF_UDP_SRC / NXM_OF_UDP_DST
+ */
+ NX_MP_FIELDS_SYMMETRIC_L4
+};
+
+/* NXAST_MULTIPATH: Multipath link choice algorithm to apply.
+ *
+ * In the descriptions below, 'n_links' is max_link + 1. */
+enum nx_mp_algorithm {
+ /* link = hash(flow) % n_links.
+ *
+ * Redistributes all traffic when n_links changes. O(1) performance. See
+ * RFC 2992.
+ *
+ * Use UINT16_MAX for max_link to get a raw hash value. */
+ NX_MP_ALG_MODULO_N,
+
+ /* link = hash(flow) / (MAX_HASH / n_links).
+ *
+ * Redistributes between one-quarter and one-half of traffic when n_links
+ * changes. O(1) performance. See RFC 2992.
+ */
+ NX_MP_ALG_HASH_THRESHOLD,
+
+ /* for i in [0,n_links):
+ * weights[i] = hash(flow, i)
+ * link = { i such that weights[i] >= weights[j] for all j != i }
+ *
+ * Redistributes 1/n_links of traffic when n_links changes. O(n_links)
+ * performance. If n_links is greater than a threshold (currently 64, but
+ * subject to change), Open vSwitch will substitute another algorithm
+ * automatically. See RFC 2992. */
+ NX_MP_ALG_HRW, /* Highest Random Weight. */
+
+ /* i = 0
+ * repeat:
+ * i = i + 1
+ * link = hash(flow, i) % arg
+ * while link > max_link
+ *
+ * Redistributes 1/n_links of traffic when n_links changes. O(1)
+ * performance when arg/max_link is bounded by a constant.
+ *
+ * Redistributes all traffic when arg changes.
+ *
+ * arg must be greater than max_link and for best performance should be no
+ * more than approximately max_link * 2. If arg is outside the acceptable
+ * range, Open vSwitch will automatically substitute the least power of 2
+ * greater than max_link.
+ *
+ * This algorithm is specific to Open vSwitch.
+ */
+ NX_MP_ALG_ITER_HASH /* Iterative Hash. */
+};
+\f
+/* Action structure for NXAST_AUTOPATH.
+ *
+ * This action performs the following steps in sequence:
+ *
+ * 1. Hashes the flow using an implementation-defined hash function.
+ *
+ * The hashed fields' values are drawn from the current state of the
+ * flow, including all modifications that have been made by actions up to
+ * this point.
+ *
+ * 2. Selects an OpenFlow 'port'.
+ *
+ * 'port' is selected in an implementation-defined manner, taking into
+ * account 'id' and the hash value calculated in step 1.
+ *
+ * Generally a switch will have been configured with a set of ports that
+ * may be chosen given 'id'. The switch may take into account any number
+ * of factors when choosing 'port' from its configured set. Factors may
+ * include carrier, load, and the results of configuration protocols such
+ * as LACP.
+ *
+ * 3. Stores 'port' in dst[ofs:ofs+n_bits].
+ *
+ * The format and semantics of 'dst' and 'ofs_nbits' are similar to those
+ * for the NXAST_REG_LOAD action, except that 'dst' must be
+ * NXM_NX_REG(idx) for 'idx' in the switch's supported range.
+ *
+ * The switch will reject actions in which ofs+n_bits is greater than the width
+ * of 'dst', with error type OFPET_BAD_ACTION, code OFPBAC_BAD_ARGUMENT.
+ */
+struct nx_action_autopath {
+ ovs_be16 type; /* OFPAT_VENDOR. */
+ ovs_be16 len; /* Length is 20. */
+ ovs_be32 vendor; /* NX_VENDOR_ID. */
+ ovs_be16 subtype; /* NXAST_MULTIPATH. */
+
+ /* Where to store the result. */
+ ovs_be16 ofs_nbits; /* (ofs << 6) | (n_bits - 1). */
+ ovs_be32 dst; /* Destination register. */
+
+ ovs_be32 id; /* Autopath ID. */
+ ovs_be32 pad;
+};
+OFP_ASSERT(sizeof(struct nx_action_autopath) == 24);
+\f
+/* Flexible flow specifications (aka NXM = Nicira Extended Match).
+ *
+ * OpenFlow 1.0 has "struct ofp_match" for specifying flow matches. This
+ * structure is fixed-length and hence difficult to extend. This section
+ * describes a more flexible, variable-length flow match, called "nx_match" for
+ * short, that is also supported by Open vSwitch. This section also defines a
+ * replacement for each OpenFlow message that includes struct ofp_match.
+ *
+ *
+ * Format
+ * ======
+ *
+ * An nx_match is a sequence of zero or more "nxm_entry"s, which are
+ * type-length-value (TLV) entries, each 5 to 259 (inclusive) bytes long.
+ * "nxm_entry"s are not aligned on or padded to any multibyte boundary. The
+ * first 4 bytes of an nxm_entry are its "header", followed by the entry's
+ * "body".
+ *
+ * An nxm_entry's header is interpreted as a 32-bit word in network byte order:
+ *
+ * |<-------------------- nxm_type ------------------>|
+ * | |
+ * |31 16 15 9| 8 7 0
+ * +----------------------------------+---------------+--+------------------+
+ * | nxm_vendor | nxm_field |hm| nxm_length |
+ * +----------------------------------+---------------+--+------------------+
+ *
+ * The most-significant 23 bits of the header are collectively "nxm_type".
+ * Bits 16...31 are "nxm_vendor", one of the NXM_VENDOR_* values below. Bits
+ * 9...15 are "nxm_field", which is a vendor-specific value. nxm_type normally
+ * designates a protocol header, such as the Ethernet type, but it can also
+ * refer to packet metadata, such as the switch port on which a packet arrived.
+ *
+ * Bit 8 is "nxm_hasmask" (labeled "hm" above for space reasons). The meaning
+ * of this bit is explained later.
+ *
+ * The least-significant 8 bits are "nxm_length", a positive integer. The
+ * length of the nxm_entry, including the header, is exactly 4 + nxm_length
+ * bytes.
+ *
+ * For a given nxm_vendor, nxm_field, and nxm_hasmask value, nxm_length is a
+ * constant. It is included only to allow software to minimally parse
+ * "nxm_entry"s of unknown types. (Similarly, for a given nxm_vendor,
+ * nxm_field, and nxm_length, nxm_hasmask is a constant.)
+ *
+ *
+ * Semantics
+ * =========
+ *
+ * A zero-length nx_match (one with no "nxm_entry"s) matches every packet.
+ *
+ * An nxm_entry places a constraint on the packets matched by the nx_match:
+ *
+ * - If nxm_hasmask is 0, the nxm_entry's body contains a value for the
+ * field, called "nxm_value". The nx_match matches only packets in which
+ * the field equals nxm_value.
+ *
+ * - If nxm_hasmask is 1, then the nxm_entry's body contains a value for the
+ * field (nxm_value), followed by a bitmask of the same length as the
+ * value, called "nxm_mask". For each 1-bit in position J in nxm_mask, the
+ * nx_match matches only packets for which bit J in the given field's value
+ * matches bit J in nxm_value. A 0-bit in nxm_mask causes the
+ * corresponding bits in nxm_value and the field's value to be ignored.
+ * (The sense of the nxm_mask bits is the opposite of that used by the
+ * "wildcards" member of struct ofp_match.)
+ *
+ * When nxm_hasmask is 1, nxm_length is always even.
+ *
+ * An all-zero-bits nxm_mask is equivalent to omitting the nxm_entry
+ * entirely. An all-one-bits nxm_mask is equivalent to specifying 0 for
+ * nxm_hasmask.
+ *
+ * When there are multiple "nxm_entry"s, all of the constraints must be met.
+ *
+ *
+ * Mask Restrictions
+ * =================
+ *
+ * Masks may be restricted:
+ *
+ * - Some nxm_types may not support masked wildcards, that is, nxm_hasmask
+ * must always be 0 when these fields are specified. For example, the
+ * field that identifies the port on which a packet was received may not be
+ * masked.
+ *
+ * - Some nxm_types that do support masked wildcards may only support certain
+ * nxm_mask patterns. For example, fields that have IPv4 address values
+ * may be restricted to CIDR masks.
+ *
+ * These restrictions should be noted in specifications for individual fields.
+ * A switch may accept an nxm_hasmask or nxm_mask value that the specification
+ * disallows, if the switch correctly implements support for that nxm_hasmask
+ * or nxm_mask value. A switch must reject an attempt to set up a flow that
+ * contains a nxm_hasmask or nxm_mask value that it does not support.
+ *
+ *
+ * Prerequisite Restrictions
+ * =========================
+ *
+ * The presence of an nxm_entry with a given nxm_type may be restricted based
+ * on the presence of or values of other "nxm_entry"s. For example:
+ *
+ * - An nxm_entry for nxm_type=NXM_OF_IP_TOS is allowed only if it is
+ * preceded by another entry with nxm_type=NXM_OF_ETH_TYPE, nxm_hasmask=0,
+ * and nxm_value=0x0800. That is, matching on the IP source address is
+ * allowed only if the Ethernet type is explicitly set to IP.
+ *
+ * - An nxm_entry for nxm_type=NXM_OF_TCP_SRC is allowed only if it is preced
+ * by an entry with nxm_type=NXM_OF_ETH_TYPE, nxm_hasmask=0,
+ * nxm_value=0x0800 and another with nxm_type=NXM_OF_IP_PROTO,
+ * nxm_hasmask=0, nxm_value=6, in that order. That is, matching on the TCP
+ * source port is allowed only if the Ethernet type is IP and the IP
+ * protocol is TCP.
+ *
+ * These restrictions should be noted in specifications for individual fields.
+ * A switch may implement relaxed versions of these restrictions. A switch
+ * must reject an attempt to set up a flow that violates its restrictions.
+ *
+ *
+ * Ordering Restrictions
+ * =====================
+ *
+ * An nxm_entry that has prerequisite restrictions must appear after the
+ * "nxm_entry"s for its prerequisites. Ordering of "nxm_entry"s within an
+ * nx_match is not otherwise constrained.
+ *
+ * Any given nxm_type may appear in an nx_match at most once.
+ *
+ *
+ * nxm_entry Examples
+ * ==================
+ *
+ * These examples show the format of a single nxm_entry with particular
+ * nxm_hasmask and nxm_length values. The diagrams are labeled with field
+ * numbers and byte indexes.
+ *
+ *
+ * 8-bit nxm_value, nxm_hasmask=1, nxm_length=1:
+ *
+ * 0 3 4 5
+ * +------------+---+---+
+ * | header | v | m |
+ * +------------+---+---+
+ *
+ *
+ * 16-bit nxm_value, nxm_hasmask=0, nxm_length=2:
+ *
+ * 0 3 4 5
+ * +------------+------+
+ * | header | value|
+ * +------------+------+
+ *
+ *
+ * 32-bit nxm_value, nxm_hasmask=0, nxm_length=4:
+ *
+ * 0 3 4 7
+ * +------------+-------------+
+ * | header | nxm_value |
+ * +------------+-------------+
+ *
+ *
+ * 48-bit nxm_value, nxm_hasmask=0, nxm_length=6:
+ *
+ * 0 3 4 9
+ * +------------+------------------+
+ * | header | nxm_value |
+ * +------------+------------------+
+ *
+ *
+ * 48-bit nxm_value, nxm_hasmask=1, nxm_length=12:
+ *
+ * 0 3 4 9 10 15
+ * +------------+------------------+------------------+
+ * | header | nxm_value | nxm_mask |
+ * +------------+------------------+------------------+
+ *
+ *
+ * Error Reporting
+ * ===============
+ *
+ * A switch should report an error in an nx_match using error type
+ * OFPET_BAD_REQUEST and one of the NXBRC_NXM_* codes. Ideally the switch
+ * should report a specific error code, if one is assigned for the particular
+ * problem, but NXBRC_NXM_INVALID is also available to report a generic
+ * nx_match error.
+ */
+
+#define NXM_HEADER__(VENDOR, FIELD, HASMASK, LENGTH) \
+ (((VENDOR) << 16) | ((FIELD) << 9) | ((HASMASK) << 8) | (LENGTH))
+#define NXM_HEADER(VENDOR, FIELD, LENGTH) \
+ NXM_HEADER__(VENDOR, FIELD, 0, LENGTH)
+#define NXM_HEADER_W(VENDOR, FIELD, LENGTH) \
+ NXM_HEADER__(VENDOR, FIELD, 1, (LENGTH) * 2)
+#define NXM_VENDOR(HEADER) ((HEADER) >> 16)
+#define NXM_FIELD(HEADER) (((HEADER) >> 9) & 0x7f)
+#define NXM_TYPE(HEADER) (((HEADER) >> 9) & 0x7fffff)
+#define NXM_HASMASK(HEADER) (((HEADER) >> 8) & 1)
+#define NXM_LENGTH(HEADER) ((HEADER) & 0xff)
+
+#define NXM_MAKE_WILD_HEADER(HEADER) \
+ NXM_HEADER_W(NXM_VENDOR(HEADER), NXM_FIELD(HEADER), NXM_LENGTH(HEADER))
+
+/* ## ------------------------------- ## */
+/* ## OpenFlow 1.0-compatible fields. ## */
+/* ## ------------------------------- ## */
+
+/* Physical or virtual port on which the packet was received.
+ *
+ * Prereqs: None.
+ *
+ * Format: 16-bit integer in network byte order.
+ *
+ * Masking: Not maskable. */
+#define NXM_OF_IN_PORT NXM_HEADER (0x0000, 0, 2)
+
+/* Source or destination address in Ethernet header.
+ *
+ * Prereqs: None.
+ *
+ * Format: 48-bit Ethernet MAC address.
+ *
+ * Masking: The nxm_mask patterns 01:00:00:00:00:00 and FE:FF:FF:FF:FF:FF must
+ * be supported for NXM_OF_ETH_DST_W (as well as the trivial patterns that
+ * are all-0-bits or all-1-bits). Support for other patterns and for masking
+ * of NXM_OF_ETH_SRC is optional. */
+#define NXM_OF_ETH_DST NXM_HEADER (0x0000, 1, 6)
+#define NXM_OF_ETH_DST_W NXM_HEADER_W(0x0000, 1, 6)
+#define NXM_OF_ETH_SRC NXM_HEADER (0x0000, 2, 6)
+
+/* Packet's Ethernet type.
+ *
+ * For an Ethernet II packet this is taken from the Ethernet header. For an
+ * 802.2 LLC+SNAP header with OUI 00-00-00 this is taken from the SNAP header.
+ * A packet that has neither format has value 0x05ff
+ * (OFP_DL_TYPE_NOT_ETH_TYPE).
+ *
+ * For a packet with an 802.1Q header, this is the type of the encapsulated
+ * frame.
+ *
+ * Prereqs: None.
+ *
+ * Format: 16-bit integer in network byte order.
+ *
+ * Masking: Not maskable. */
+#define NXM_OF_ETH_TYPE NXM_HEADER (0x0000, 3, 2)
+
+/* 802.1Q TCI.
+ *
+ * For a packet with an 802.1Q header, this is the Tag Control Information
+ * (TCI) field, with the CFI bit forced to 1. For a packet with no 802.1Q
+ * header, this has value 0.
+ *
+ * Prereqs: None.
+ *
+ * Format: 16-bit integer in network byte order.
+ *
+ * Masking: Arbitrary masks.
+ *
+ * This field can be used in various ways:
+ *
+ * - If it is not constrained at all, the nx_match matches packets without
+ * an 802.1Q header or with an 802.1Q header that has any TCI value.
+ *
+ * - Testing for an exact match with 0 matches only packets without an
+ * 802.1Q header.
+ *
+ * - Testing for an exact match with a TCI value with CFI=1 matches packets
+ * that have an 802.1Q header with a specified VID and PCP.
+ *
+ * - Testing for an exact match with a nonzero TCI value with CFI=0 does
+ * not make sense. The switch may reject this combination.
+ *
+ * - Testing with a specific VID and CFI=1, with nxm_mask=0x1fff, matches
+ * packets that have an 802.1Q header with that VID (and any PCP).
+ *
+ * - Testing with a specific PCP and CFI=1, with nxm_mask=0xf000, matches
+ * packets that have an 802.1Q header with that PCP (and any VID).
+ *
+ * - Testing with nxm_value=0, nxm_mask=0x0fff matches packets with no 802.1Q
+ * header or with an 802.1Q header with a VID of 0.
+ *
+ * - Testing with nxm_value=0, nxm_mask=0xe000 matches packets with no 802.1Q
+ * header or with an 802.1Q header with a PCP of 0.
+ *
+ * - Testing with nxm_value=0, nxm_mask=0xefff matches packets with no 802.1Q
+ * header or with an 802.1Q header with both VID and PCP of 0.
+ */
+#define NXM_OF_VLAN_TCI NXM_HEADER (0x0000, 4, 2)
+#define NXM_OF_VLAN_TCI_W NXM_HEADER_W(0x0000, 4, 2)
+
+/* The "type of service" byte of the IP header, with the ECN bits forced to 0.
+ *
+ * Prereqs: NXM_OF_ETH_TYPE must be either 0x0800 or 0x86dd.
+ *
+ * Format: 8-bit integer with 2 least-significant bits forced to 0.
+ *
+ * Masking: Not maskable. */
+#define NXM_OF_IP_TOS NXM_HEADER (0x0000, 5, 1)
+
+/* The "protocol" byte in the IP header.
+ *
+ * Prereqs: NXM_OF_ETH_TYPE must be either 0x0800 or 0x86dd.
+ *
+ * Format: 8-bit integer.
+ *
+ * Masking: Not maskable. */
+#define NXM_OF_IP_PROTO NXM_HEADER (0x0000, 6, 1)