/*
- * Copyright (c) 2010 Nicira Networks.
+ * Copyright (c) 2010, 2011 Nicira Networks.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
/* For each NXM_* field, define NFI_NXM_* as consecutive integers starting from
* zero. */
enum nxm_field_index {
-#define DEFINE_FIELD(HEADER, WILDCARD, DL_TYPE, NW_PROTO) NFI_NXM_##HEADER,
+#define DEFINE_FIELD(HEADER, WILDCARD, DL_TYPE, NW_PROTO, WRITABLE) \
+ NFI_NXM_##HEADER,
#include "nx-match.def"
N_NXM_FIELDS
};
ovs_be16 dl_type; /* dl_type prerequisite, if nonzero. */
uint8_t nw_proto; /* nw_proto prerequisite, if nonzero. */
const char *name; /* "NXM_*" string. */
+ bool writable; /* Writable with NXAST_REG_{MOVE,LOAD}? */
};
/* All the known fields. */
static struct nxm_field nxm_fields[N_NXM_FIELDS] = {
-#define DEFINE_FIELD(HEADER, WILDCARD, DL_TYPE, NW_PROTO) \
+#define DEFINE_FIELD(HEADER, WILDCARD, DL_TYPE, NW_PROTO, WRITABLE) \
{ HMAP_NODE_NULL_INITIALIZER, NFI_NXM_##HEADER, NXM_##HEADER, WILDCARD, \
- CONSTANT_HTONS(DL_TYPE), NW_PROTO, "NXM_" #HEADER },
+ CONSTANT_HTONS(DL_TYPE), NW_PROTO, "NXM_" #HEADER, WRITABLE },
#include "nx-match.def"
};
/* Verify that the header values are unique (duplicate "case" values
* cause a compile error). */
switch (0) {
-#define DEFINE_FIELD(HEADER, WILDCARD, DL_TYPE, NW_PROTO) \
+#define DEFINE_FIELD(HEADER, WILDCARD, DL_TYPE, NW_PROTO, WRITABLE) \
case NXM_##HEADER: break;
#include "nx-match.def"
}
memcpy(flow->dl_src, value, ETH_ADDR_LEN);
return 0;
case NFI_NXM_OF_ETH_TYPE:
- flow->dl_type = get_unaligned_be16(value);
+ flow->dl_type = ofputil_dl_type_from_openflow(get_unaligned_be16(value));
return 0;
/* 802.1Q header. */
/* Tunnel ID. */
case NFI_NXM_NX_TUN_ID:
- flow->tun_id = get_unaligned_be64(value);
- return 0;
+ if (wc->tun_id_mask) {
+ return NXM_DUP_TYPE;
+ } else {
+ cls_rule_set_tun_id(rule, get_unaligned_be64(value));
+ return 0;
+ }
+ case NFI_NXM_NX_TUN_ID_W:
+ if (wc->tun_id_mask) {
+ return NXM_DUP_TYPE;
+ } else {
+ ovs_be64 tun_id = get_unaligned_be64(value);
+ ovs_be64 tun_mask = get_unaligned_be64(mask);
+ cls_rule_set_tun_id_masked(rule, tun_id, tun_mask);
+ return 0;
+ }
/* Registers. */
case NFI_NXM_NX_REG0:
ofpbuf_put(b, &value, sizeof value);
}
+static void
+nxm_put_64w(struct ofpbuf *b, uint32_t header, ovs_be64 value, ovs_be64 mask)
+{
+ nxm_put_header(b, header);
+ ofpbuf_put(b, &value, sizeof value);
+ ofpbuf_put(b, &mask, sizeof mask);
+}
+
+static void
+nxm_put_64m(struct ofpbuf *b, uint32_t header, ovs_be64 value, ovs_be64 mask)
+{
+ switch (mask) {
+ case 0:
+ break;
+
+ case CONSTANT_HTONLL(UINT64_MAX):
+ nxm_put_64(b, header, value);
+ break;
+
+ default:
+ nxm_put_64w(b, NXM_MAKE_WILD_HEADER(header), value, mask);
+ break;
+ }
+}
+
static void
nxm_put_eth(struct ofpbuf *b, uint32_t header,
const uint8_t value[ETH_ADDR_LEN])
nxm_put_eth(b, NXM_OF_ETH_SRC, flow->dl_src);
}
if (!(wc & FWW_DL_TYPE)) {
- nxm_put_16(b, NXM_OF_ETH_TYPE, flow->dl_type);
+ nxm_put_16(b, NXM_OF_ETH_TYPE,
+ ofputil_dl_type_to_openflow(flow->dl_type));
}
/* 802.1Q. */
}
/* Tunnel ID. */
- if (!(wc & FWW_TUN_ID)) {
- nxm_put_64(b, NXM_NX_TUN_ID, flow->tun_id);
- }
+ nxm_put_64m(b, NXM_NX_TUN_ID, flow->tun_id, cr->wc.tun_id_mask);
/* Registers. */
for (i = 0; i < FLOW_N_REGS; i++) {
uint32_t dst = ntohl(load->dst);
uint64_t value = ntohll(load->value);
- ds_put_format(s, "load:%"PRIu64"->", value);
+ ds_put_format(s, "load:%#"PRIx64"->", value);
nxm_format_field_bits(s, dst, ofs, n_bits);
}
\f
return BAD_ARGUMENT;
}
- if (!NXM_IS_NX_REG(dst->header)
- && dst->header != NXM_OF_VLAN_TCI
- && dst->header != NXM_NX_TUN_ID) {
+ if (!dst->writable) {
return BAD_ARGUMENT;
}
return BAD_ARGUMENT;
}
- if (!NXM_IS_NX_REG(dst->header)) {
+ if (!dst->writable) {
return BAD_ARGUMENT;
}
return eth_addr_to_uint64(flow->dl_src);
case NFI_NXM_OF_ETH_TYPE:
- return ntohs(flow->dl_type);
+ return ntohs(ofputil_dl_type_to_openflow(flow->dl_type));
case NFI_NXM_OF_VLAN_TCI:
return ntohs(flow->vlan_tci);
#error
#endif
+ case NFI_NXM_NX_TUN_ID_W:
case NFI_NXM_OF_ETH_DST_W:
case NFI_NXM_OF_VLAN_TCI_W:
case NFI_NXM_OF_IP_SRC_W:
NOT_REACHED();
}
+static void
+nxm_write_field(const struct nxm_field *dst, struct flow *flow,
+ uint64_t new_value)
+{
+ switch (dst->index) {
+ case NFI_NXM_OF_VLAN_TCI:
+ flow->vlan_tci = htons(new_value);
+ break;
+
+ case NFI_NXM_NX_TUN_ID:
+ flow->tun_id = htonll(new_value);
+ break;
+
+#define NXM_WRITE_REGISTER(IDX) \
+ case NFI_NXM_NX_REG##IDX: \
+ flow->regs[IDX] = new_value; \
+ break; \
+ case NFI_NXM_NX_REG##IDX##_W: \
+ NOT_REACHED();
+
+ NXM_WRITE_REGISTER(0);
+#if FLOW_N_REGS >= 2
+ NXM_WRITE_REGISTER(1);
+#endif
+#if FLOW_N_REGS >= 3
+ NXM_WRITE_REGISTER(2);
+#endif
+#if FLOW_N_REGS >= 4
+ NXM_WRITE_REGISTER(3);
+#endif
+#if FLOW_N_REGS > 4
+#error
+#endif
+
+ case NFI_NXM_OF_IN_PORT:
+ case NFI_NXM_OF_ETH_DST:
+ case NFI_NXM_OF_ETH_SRC:
+ case NFI_NXM_OF_ETH_TYPE:
+ case NFI_NXM_OF_IP_TOS:
+ case NFI_NXM_OF_IP_PROTO:
+ case NFI_NXM_OF_ARP_OP:
+ case NFI_NXM_OF_IP_SRC:
+ case NFI_NXM_OF_ARP_SPA:
+ case NFI_NXM_OF_IP_DST:
+ case NFI_NXM_OF_ARP_TPA:
+ case NFI_NXM_OF_TCP_SRC:
+ case NFI_NXM_OF_UDP_SRC:
+ case NFI_NXM_OF_TCP_DST:
+ case NFI_NXM_OF_UDP_DST:
+ case NFI_NXM_OF_ICMP_TYPE:
+ case NFI_NXM_OF_ICMP_CODE:
+ case NFI_NXM_NX_TUN_ID_W:
+ case NFI_NXM_OF_ETH_DST_W:
+ case NFI_NXM_OF_VLAN_TCI_W:
+ case NFI_NXM_OF_IP_SRC_W:
+ case NFI_NXM_OF_IP_DST_W:
+ case NFI_NXM_OF_ARP_SPA_W:
+ case NFI_NXM_OF_ARP_TPA_W:
+ case N_NXM_FIELDS:
+ NOT_REACHED();
+ }
+}
+
void
nxm_execute_reg_move(const struct nx_action_reg_move *action,
struct flow *flow)
/* Get the final value. */
uint64_t new_data = dst_data | ((src_data >> src_ofs) << dst_ofs);
- /* Store the result. */
- if (NXM_IS_NX_REG(dst->header)) {
- flow->regs[NXM_NX_REG_IDX(dst->header)] = new_data;
- } else if (dst->header == NXM_OF_VLAN_TCI) {
- flow->vlan_tci = htons(new_data);
- } else if (dst->header == NXM_NX_TUN_ID) {
- flow->tun_id = htonll(new_data);
- } else {
- NOT_REACHED();
- }
+ nxm_write_field(dst, flow, new_data);
}
void
{
/* Preparation. */
int n_bits = nxm_decode_n_bits(action->ofs_nbits);
- uint32_t mask = n_bits == 32 ? UINT32_MAX : (UINT32_C(1) << n_bits) - 1;
- uint32_t *reg = &flow->regs[NXM_NX_REG_IDX(ntohl(action->dst))];
+ uint64_t mask = n_bits == 64 ? UINT64_MAX : (UINT64_C(1) << n_bits) - 1;
/* Get source data. */
- uint32_t src_data = ntohll(action->value);
+ uint64_t src_data = ntohll(action->value);
/* Get remaining bits of the destination field. */
+ const struct nxm_field *dst = nxm_field_lookup(ntohl(action->dst));
int dst_ofs = nxm_decode_ofs(action->ofs_nbits);
- uint32_t dst_data = *reg & ~(mask << dst_ofs);
+ uint64_t dst_data = nxm_read_field(dst, flow) & ~(mask << dst_ofs);
+
+ /* Get the final value. */
+ uint64_t new_data = dst_data | (src_data << dst_ofs);
- *reg = dst_data | (src_data << dst_ofs);
+ nxm_write_field(dst, flow, new_data);
}