#include "thread.h"
#include "timer.h"
\f
-enum if_level
+enum intr_level
intr_get_level (void)
{
uint32_t flags;
asm ("pushfl; popl %0" : "=g" (flags));
- return flags & (1 << 9) ? IF_ON : IF_OFF;
+ return flags & (1 << 9) ? INTR_ON : INTR_OFF;
}
-enum if_level
-intr_set_level (enum if_level level)
+enum intr_level
+intr_set_level (enum intr_level level)
{
- enum if_level old_level = intr_get_level ();
- if (level == IF_ON)
+ enum intr_level old_level = intr_get_level ();
+ if (level == INTR_ON)
intr_enable ();
else
intr_disable ();
return old_level;
}
-enum if_level
+enum intr_level
intr_enable (void)
{
- enum if_level old_level = intr_get_level ();
+ enum intr_level old_level = intr_get_level ();
asm volatile ("sti");
return old_level;
}
-enum if_level
+enum intr_level
intr_disable (void)
{
- enum if_level old_level = intr_get_level ();
+ enum intr_level old_level = intr_get_level ();
asm volatile ("cli");
return old_level;
}
bool external = args->vec_no >= 0x20 && args->vec_no < 0x30;
if (external)
{
- ASSERT (intr_get_level () == IF_OFF);
+ ASSERT (intr_get_level () == INTR_OFF);
ASSERT (!intr_context ());
intr_in_progress = true;
yield_on_return = false;
if (external)
{
- ASSERT (intr_get_level () == IF_OFF);
+ ASSERT (intr_get_level () == INTR_OFF);
ASSERT (intr_context ());
intr_in_progress = false;
pic_eoi (args->vec_no);
yield_on_return = true;
}
-intr_handler_func intr_panic NO_RETURN;
-intr_handler_func intr_kill NO_RETURN;
+static intr_handler_func panic NO_RETURN;
+static intr_handler_func kill NO_RETURN;
static uint64_t
make_gate (void (*target) (void), int dpl, enum seg_type type)
}
void
-intr_register (uint8_t vec_no, int dpl, enum if_level level,
+intr_register (uint8_t vec_no, int dpl, enum intr_level level,
intr_handler_func *handler,
const char *name)
{
/* Interrupts generated by external hardware (0x20 <= VEC_NO <=
- 0x2f) should specify IF_OFF for LEVEL. Otherwise a timer
+ 0x2f) should specify INTR_OFF for LEVEL. Otherwise a timer
interrupt could cause a task switch during interrupt
handling. Most other interrupts can and should be handled
with interrupts enabled. */
- ASSERT (vec_no < 0x20 || vec_no > 0x2f || level == IF_OFF);
+ ASSERT (vec_no < 0x20 || vec_no > 0x2f || level == INTR_OFF);
- if (level == IF_ON)
+ if (level == INTR_ON)
idt[vec_no] = make_trap_gate (intr_stubs[vec_no], dpl);
else
idt[vec_no] = make_intr_gate (intr_stubs[vec_no], dpl);
/* Install default handlers. */
for (i = 0; i < 256; i++)
- intr_register (i, 0, IF_OFF, intr_panic, NULL);
+ intr_register (i, 0, INTR_OFF, panic, NULL);
/* Most exceptions require ring 0.
Exceptions 3, 4, and 5 can be caused by ring 3 directly. */
- intr_register (0, 0, IF_ON, intr_kill, "#DE Divide Error");
- intr_register (1, 0, IF_ON, intr_kill, "#DB Debug Exception");
- intr_register (2, 0, IF_ON, intr_panic, "NMI Interrupt");
- intr_register (3, 3, IF_ON, intr_kill, "#BP Breakpoint Exception");
- intr_register (4, 3, IF_ON, intr_kill, "#OF Overflow Exception");
- intr_register (5, 3, IF_ON, intr_kill, "#BR BOUND Range Exceeded Exception");
- intr_register (6, 0, IF_ON, intr_kill, "#UD Invalid Opcode Exception");
- intr_register (7, 0, IF_ON, intr_kill, "#NM Device Not Available Exception");
- intr_register (8, 0, IF_ON, intr_panic, "#DF Double Fault Exception");
- intr_register (9, 0, IF_ON, intr_panic, "Coprocessor Segment Overrun");
- intr_register (10, 0, IF_ON, intr_panic, "#TS Invalid TSS Exception");
- intr_register (11, 0, IF_ON, intr_kill, "#NP Segment Not Present");
- intr_register (12, 0, IF_ON, intr_kill, "#SS Stack Fault Exception");
- intr_register (13, 0, IF_ON, intr_kill, "#GP General Protection Exception");
- intr_register (16, 0, IF_ON, intr_kill, "#MF x87 FPU Floating-Point Error");
- intr_register (17, 0, IF_ON, intr_panic, "#AC Alignment Check Exception");
- intr_register (18, 0, IF_ON, intr_panic, "#MC Machine-Check Exception");
- intr_register (19, 0, IF_ON, intr_kill, "#XF SIMD Floating-Point Exception");
+ intr_register (0, 0, INTR_ON, kill, "#DE Divide Error");
+ intr_register (1, 0, INTR_ON, kill, "#DB Debug Exception");
+ intr_register (2, 0, INTR_ON, panic, "NMI Interrupt");
+ intr_register (3, 3, INTR_ON, kill, "#BP Breakpoint Exception");
+ intr_register (4, 3, INTR_ON, kill, "#OF Overflow Exception");
+ intr_register (5, 3, INTR_ON, kill, "#BR BOUND Range Exceeded Exception");
+ intr_register (6, 0, INTR_ON, kill, "#UD Invalid Opcode Exception");
+ intr_register (7, 0, INTR_ON, kill, "#NM Device Not Available Exception");
+ intr_register (8, 0, INTR_ON, panic, "#DF Double Fault Exception");
+ intr_register (9, 0, INTR_ON, panic, "Coprocessor Segment Overrun");
+ intr_register (10, 0, INTR_ON, panic, "#TS Invalid TSS Exception");
+ intr_register (11, 0, INTR_ON, kill, "#NP Segment Not Present");
+ intr_register (12, 0, INTR_ON, kill, "#SS Stack Fault Exception");
+ intr_register (13, 0, INTR_ON, kill, "#GP General Protection Exception");
+ intr_register (16, 0, INTR_ON, kill, "#MF x87 FPU Floating-Point Error");
+ intr_register (17, 0, INTR_ON, panic, "#AC Alignment Check Exception");
+ intr_register (18, 0, INTR_ON, panic, "#MC Machine-Check Exception");
+ intr_register (19, 0, INTR_ON, kill, "#XF SIMD Floating-Point Exception");
/* Most exceptions can be handled with interrupts turned on.
We need to disable interrupts for page faults because the
fault address is stored in CR2 and needs to be preserved. */
- intr_register (14, 0, IF_OFF, intr_kill, "#PF Page-Fault Exception");
+ intr_register (14, 0, INTR_OFF, kill, "#PF Page-Fault Exception");
idtr_operand = make_dtr_operand (sizeof idt - 1, idt);
asm volatile ("lidt %0" :: "m" (idtr_operand));
f->cs, f->ds, f->es, f->cs != SEL_KCSEG ? f->ss : ss);
}
-void
-intr_panic (struct intr_frame *regs)
+static void
+panic (struct intr_frame *regs)
{
dump_intr_frame (regs);
PANIC ("Panic!");
}
-void
-intr_kill (struct intr_frame *f)
+static void
+kill (struct intr_frame *f)
{
switch (f->cs)
{
case SEL_KCSEG:
printk ("Kernel bug - unexpected interrupt in kernel context\n");
- intr_panic (f);
+ panic (f);
default:
printk ("Interrupt %#04x (%s) in unknown segment %04x\n",